Communications Infrastructure

Application Notes

Low-Cost Programmable Upconverter Fits Within Small Footprint

AN-1051: Reference Design for the AD9552 Oscillator Frequency Upconverter

The AD9552 low-cost programmable device accepts a low-frequency input signal (10 MHz to 70 MHz) and upconverts it to a high-frequency output signal (up to 900 MHz). This 4-page Application Note, which provides a reference design including performance measurements of the output signal, demonstrates that the AD9552 (and all supporting components) fits within a 9 mm × 14 mm footprint—the same size as some currently available oscillator packages. Refer to AN-0988 for additional information on the features and function of the AD9552.

RF Calibration Allows Wireless Transmitters to Meet Regulations, Save Power, and Reduce Cost

AN-1040: RF Power Calibration Improves Performance of Wireless Transmitters

Measurement and control of RF power is a critical consideration when designing a wireless transmitter. High power RF amplifiers (PAs) rarely operate in open-loop mode, that is, when the power to the antenna is not in some way monitored. External factors such as regulatory requirements on the amount of power transmitted, network robustness, and the need to coexist with other wireless networks, demand that there be tight control of transmitted power. In addition to these external requirements, precise RF power control can result in improved spectral performance and can save cost and energy in the transmitter’s power amplifier. To regulate its transmitted power, some form of factory calibration of the PA output power may be necessary. Calibration algorithms vary vastly in terms of their complexity and effectiveness. This 8-page Application Note describes how a typical RF power control scheme is implemented and compares the effectiveness and efficiency of various factory calibration algorithms.

ADC Drivers Optimize the Performance of High-Speed Differential ADCs

AN-1026: High Speed Differential ADC Driver Design Considerations

Most modern high-performance ADCs use differential inputs to reject common-mode noise and interference, increase dynamic range by a factor of two, and improve overall performance. ADC drivers—circuits often specifically designed to provide differential signals—perform many important functions including amplitude scaling, single-ended-to-differential conversion, buffering, common-mode offset adjustment, and filtering. This 16-page Application Note discusses design considerations including: Terminating the Input to an ADC Driver, Input Common-Mode Voltage Range (ICMVR), Input and Output Coupling: AC or DC, Output Swing, Noise, Supply Voltage, Harmonic Distortion, Bandwidth and Slew Rate, Stability, and PC Board Layout.

Algorithms improve Error Vector Magnitude and Bit Error Rate in Direct Conversion Transmitters

AN-1039: Correcting Imperfections in IQ Modulators to Improve RF Signal Fidelity

The in-phase/quadrature modulator (IQ modulator) provides a convenient method for modulating data bits or symbols onto an RF carrier, making it a key component in modern wireless transmitters. IQ upconversion has become the architecture of choice for implementing transmitter signal chains in cellular, WiMAX, and wireless point-to-point applications. Unfortunately, IQ modulators can degrade the quality of the transmitted signal during the modulation process, resulting in increased error vector magnitude (EVM) at the receiver, which in turn increases bit error rate (BER). Fortunately, algorithms exist that can correct these imperfections. This 8-page Application Note describes a typical zero-IF (direct-conversion) transmitter and provides a brief introduction to digital modulation. In addition, the imperfections introduced by the modulator are examined with particular focus on the effect of temperature and frequency changes. In-factory and in-field algorithms that can reduce the effect of these modulator imperfections are also discussed, with particular focus placed on the efficacy of in-factory set-and-forget algorithms.

New Product Briefs

March 2010

Dual 16-bit continuous-time Sigma-Delta Analog-to-Digital Converter

The AD9262 dual continuous-time sigma-delta ADC achieves 16-bit resolution, 83-dB signal-to-noise ratio, and 87-dB dynamic range over a 10-MHz analog input bandwidth. Its resistive input eases the requirements of the driver amplifier; its 5th-order loop filter reduces the need for an external anti-aliasing filter; and its integrated decimation filter, sample-rate converter, PLL-clock multiplier, and voltage reference make it easy to use. The output clock and data are provided at a user-defined rate between 30 Msps and 160 Msps. Operating on a single 1.8-V supply, the AD9262 dissipates 600 mW with a sine-wave input, 23 mW in power-down mode, 10 mW in standby mode, and 3 mW in sleep mode. Available in a 64-lead LFCSP package, it is specified from –40°C to +85°C and priced from $30.00 in 1000s.

Dual 16-bit, 20-/40-/65-/80-MHz Pipelined Analog-to-Digital Converter

The AD9269 dual pipelined A/D converter provides 16-bit resolution with no missing codes at sampling rates to 80 Msps, making it ideal for ultrasound equipment, broadband communication, and battery-powered instruments. Fully differential analog inputs accept signals with a 2-V p-p full-scale range at frequencies up to 700 MHz. With a 9.7-MHz input, it specifies 77-dBFS signal-to-noise ratio (SNR) and 93-dBc spurious-free dynamic range (SFDR). Output data is available from two CMOS-compatible parallel ports. Functionally complete, the device includes a programmable clock divider, clock duty-cycle stabilizer, voltage reference, SPI-compatible port, and programmable test pattern generation. The AD9269 is pin compatible with the AD9204/31/51 and AD9258/68 families, providing a migration path from 10 bits to 16 bits and from 20 Msps to 125 Msps. Operating on a single 1.8-V supply, the AD9269 dissipates 225 mW with a sine-wave input, 37 mW in standby mode, and 1 mW in sleep mode. Available in a 64-lead LFCSP package, it is specified from –40°C to +85°C and priced from $49.00 in 1000s.

Two-channel RF Transceiver for WiMAX/BWA/WiBRO/LTE applications

The AD9356 high-performance RF transceiver comprises two high-linearity transmitters and two direct-conversion receivers, making it ideally suited for WiMAX, WiBRO, BWA, and LTE base stations and fixed CPEs. Combining an RF front-end with a mixed-signal baseband, it provides an easy-to-use interface to a baseband processor (BBP). Operating in the 2.3-GHz to 2.7-GHz range, and supporting channel bandwidths from 3.5 MHz to 10 MHz, it covers most licensed and unlicensed bands. The receivers feature high linearity and 3.5-dB noise figure (NF). They include automatic-gain control, dc-offset correction, and quadrature calibration, eliminating the need for high-speed interaction with the BBP. The transmitters feature –40-dB error-vector magnitude (EVM) and 130-dB/Hz signal-to-noise ratio (SNR). A power detector independently measures the output power of each transmitter over a 50-dB range. The AD9356 operates on a single 3.3-V supply. Available in a 144-ball BGA package, it is priced at $34.95 in 1000s.

Two-output Network Clock Generator

The AD9575 two-output clock generator uses a high-performance, low-jitter, integer-N PLL with fixed output- and feedback divider ratios to provide: a 100-MHz LVDS or LVPECL output and a selectable 33.33-/62.6-MHz LVCMOS output. No external components are required for the loop filters, saving space, cost, and design time. Operating on a single 3.0-V to 3.6-V supply, the AD9575 dissipates 100 mW. Specified from –40°C to +85°C, it is available in a 16-lead TSSOP package and priced at $6.75 in 1000s.

1550-MHz to 2150-MHz Active Mixer includes VCO and fractional-N PLL

The ADRF6602 high-dynamic-range active mixer converts a single-ended RF input into a differential IF output with up to 500-MHz bandwidth. Its on-chip fractional-N PLL and VCO generate the local-oscillator (LO) input to the mixer. A reference input in the range of 12 MHz to 160 MHz can be multiplied by 1 or 2, or divided by 2 or 4, then applied to the PLL phase detector. The ADRF6602 accepts RF inputs in the 1100-MHz to 3200-MHz range, and generates an LO from 1550 MHz to 2150 MHz. The RF input is matched to 50 ohms; the IF outputs are matched to 200 ohms. The ADRF6602 is part of a family of active mixers that address applications across the cellular frequency bands in applications up to 3 GHz. Operating on a single 4.75-V to 5.25-V supply, the ADRF6602 draws 262 mA with the internal PLL enabled, 165 mA with the PLL disabled, and 30 mA in power-down mode. Specified from –40°C to +85°C, it is available in a 40-lead LFCSP package and priced at $10.88 in 1000s.

950-MHz to 1575-MHz Quadrature Modulator includes VCO and fractional-N PLL

The ADRF6750 quadrature modulator integrates an I/Q modulator, fractional-N PLL synthesizer, voltage-controlled oscillator, and digitally controlled RF attenuator within a compact 8-mm × 8-mm package—saving space, reducing cost, and lowering complexity in VSAT (very small aperture terminals) and other broadband satellite-communications applications. Operating from 950 MHz to 1575 MHz, the device features 250-MHz modulation bandwidth, 1-Hz resolution, 47-dB gain range with 1-dB steps, 8.5-dBm output compression (P1dB), 23-dBm output third-order intercept (IP3) and –162-dBc/Hz noise floor. A user-selectable SPI/I²C serial interface provides maximum flexibility. Operating on a single 4.75-V to 5.25-V supply, the ADRF6750 draws 310 mA. Specified from –40°C to +85°C, it is available in a 56-lead LFCSP package and priced at $9.98 in 1000s.

February 2010

Quad low-power, low-noise, wideband Operational Amplifier has rail-to-rail output

The ADA4691-4 quad low-power operational amplifier draws only 165 µA per amplifier while operating from a single 2.7-V to 5.5-V supply or dual ±1.35-V to ±2.5-V supplies. Two pairs of amplifiers can be powered down independently, reducing power consumption to 10 nA in shutdown mode. Featuring 500-μV offset, 1‑μV/°C offset drift, 0.5-pA bias current, 90-dB common-mode rejection, 3.6-MHz bandwidth, 1.1-V/μs slew rate, 16‑nV/rt-Hz noise, and 0.006% distortion, the amplifier is ideally suited for instrumentation, portable audio, and medical applications. The input range extends below the negative rail, and the output can swing to within 30 mV of either rail, providing true single-supply capability. Specified from –40°C to +125°C, and available in a 16‑lead LFCSP package, it is priced at $0.90 in 1000s.

Precision Analog Microcontroller includes ARM7TDMI MCU, 12-bit analog I/O

The ADuC7023 precision analog microcontroller combines 12-bit analog I/O, an MCU, and a host of peripherals to form a complete 12-bit, 1-Msps data-acquisition system-on-a-chip. The analog peripherals include a multichannel 12-bit ADC; four 12-bit DACs; a comparator; a precision 2.5-V, 15‑ppm/°C reference; and a temperature sensor. The ADC features ±0.6‑LSB integral nonlinearity (INL), ±0.5-LSB differential nonlinearity (DNL), 0 to V_REF input range in single-ended mode, and V_CM ± V_REF/2 input range in differential mode. The DACs feature ±2-LSB INL, ±1-LSB DNL, and a selectable 0­ to 2.5-V or 0 to AV_DD output range. The 16-/32-bit ARM7TDMI RISC MCU, operating from an on-chip oscillator and PLL, offers up to 41-MIPS peak performance. Program and data are stored in 8 kB of SRAM and 62 kB of nonvolatile memory. The digital peripherals include three timers, five 16-bit PWMs, a vector-interrupt controller, a watchdog timer, 20 GPIO pins, an SPI port, and two I²C interfaces. JTAG-based debug and the QuickStart development system facilitate system design and speed time to market. Operating on a single 2.7-V to 3.6-V supply, the ADuC7023 consumes 28 mA with a 41.78-MHz core clock and 230 µA in sleep mode. Specified from –40°C to +125°C, it is available in 5-mm x 5-mm 32-lead and 6-mm x 6-mm 40-lead LFCSP packages and priced at $2.99 in 1000s.

Precision Analog Microcontroller includes ARM7TDMI MCU, 12-bit analog I/O

The ADuC7029 precision analog microcontroller combines 12-bit analog I/O, an MCU, and a host of peripherals to form a complete 12-bit, 1-Msps data-acquisition system-on-a-chip. The analog peripherals include a multichannel 12-bit ADC; four 12-bit DACs; a comparator; a precision 2.5-V, 40‑ppm/°C reference; and a temperature sensor. The ADC features ±0.6‑LSB integral nonlinearity (INL), ±0.5-LSB differential nonlinearity (DNL), 0 to V_REF input range in single-ended mode, and V_CM ± V_REF/2 input range in differential mode. The DACs feature ±2‑LSB INL, ±1-LSB DNL, and a selectable 0­ to 2.5-V, 0 to DAC_REF, or 0 to DACV_DD output range. The 16-/32-bit ARM7TDMI RISC MCU, operating from an on-chip oscillator and PLL, offers up to 41-MIPS peak performance. Program and data are stored in 8 kB of SRAM and 62 kB of nonvolatile memory. The digital peripherals include four timers, a 3‑phase, 16-bit PWM, a UART, a watchdog timer, 40 GPIO pins, an SPI port, two I²C interfaces, and an external memory interface. JTAG-based debug and the QuickStart development system facilitate system design and speed time to market. Operating on a single 2.7-V to 3.6-V supply, the ADuC7029 consumes 40 mA with a 41.78-MHz core clock and 250 µA in sleep mode. Specified from –40°C to +125°C, it is available in a 5-mm x 5-mm 49-ball CSP-BGA package and priced at $4.66 in 1000s.

450-MHz to 6000-MHz TruPwr Detector

The ADL5504 TruPwr™ detector measures RF signal power over a 450-MHz to 6000-MHz frequency range. Its dc output voltage is proportional to the rms value of the input voltage, with 1.87-V/Vrms conversion gain and 35-dB dynamic range at 900 MHz. This highly accurate, easy to use means of determining the rms value of complex waveforms is particularly useful for handling the high-crest-factor waveforms found in W-CDMA, CDMA2000, LTE, and WiMAX systems. Operating with a single 2.5-V to 3.3-V supply, the ADL5504 consumes 1.8 mA of quiescent current and 0.1 μA when disabled. Available in a 6-ball WLCSP package, it is specified from –40°C to 85°C and priced at $2.90 in 1000s.

January 2010

250-kbps, low-power, full-duplex, slew-rate-limited RS-485 Transceivers

The ADM488A/ADM489A low-power RS-485 transceivers provide full-duplex communication on multipoint bus transmission lines at data rates up to 250 kbps. Designed for balanced transmission, they comply with TIA/EIA RS-485 and RS-422 standards. As many as 32 devices can share a single bus; but to avoid bus loading, driver outputs are set to a high-impedance mode if: the input is floating, the driver is disabled, or a fault condition has been detected. The drivers are slew-rate limited to minimize EMI and data errors. Operating on a single 5-V supply, the transceivers are specified from –40°C to +85°C. Available in 8‑lead SOIC and 10-lead MSOP packages, the ADM488A consumes 37 μA. It is priced from $0.90 in 1000s. The ADM489A adds driver- and receiver enable controls. Available in 10-lead MSOP and 14-lead SOIC packages, it consumes 37 μA when enabled and 30 μA when disabled. It is priced from $1.05 in 1000s.

Step-down DC-to-DC Converter provides two 3-A outputs or single 6-A output

The ADP2116 high-efficiency step-down dc-to-dc converter is available in six fixed-output options, from 0.8 V to 3.3 V, plus an adjustable-output option that can be set as low as 0.6 V. Featuring output accuracy to within 1.5% and 95% efficiency, it can be configured to deliver: a pair of independent 3-A outputs, 3-A and 2-A outputs, or a single, interleaved 6-A output with reduced output ripple. The switching frequency can be set to 300 kHz, 600 kHz, or 1.2 MHz—or it can be synchronized to an external clock in the 200-kHz to 2-MHz range. Optimized gate slew-rate reduces EMI emissions. The robust design features programmable soft-start time, short-circuit- and thermal-overload protection, and under-voltage lockout. Operating on a single 2.7-V to 5.5-V supply, the ADP2116 consumes 3.4 mA with dual independent outputs, 3 mA with a single output, and 1 µA in shutdown mode. Available in a 32‑lead LFCSP package, it is specified from –40°C to +125°C and priced at $3.17 in 1000s.

Dual Balanced Mixer includes LO buffers, IF amplifiers, RF baluns

The ADL5358 dual balanced mixer combines RF inputs in the 500-MHz to 1700-MHz range with a local oscillator (LO) to produce IF outputs in the 30-MHz to 450-MHz range. Optimal performance is achieved using high-side LO injection for frequencies between 500 MHz and 1200 MHz—and low-side LO injection for frequencies between 1200 MHz and 1700 MHz. Integrated balancing circuitry enables the use of single-ended RF and LO inputs. The doubly balanced passive mixer cores provide high linearity, low intermodulation distortion, and low leakage. A high-linearity IF buffer amp follows each mixer core, adding an 8.3-dB typical power-conversion gain. Other specs include: 9.9-dB single-sideband noise figure, 25.2-dBm input third-order intercept (IP3), and 10.6-dBm input compression point (P1dB). Operating on a single 3.0-V to 5.25-V supply, the ADL5358 consumes 350 mA at 5 V, 200 mA at 3.3 V, and 350 µA when disabled. Available in a 36-lead LFCSP package, it is specified from –40°C to +85°C and priced at $9.98 in 1000s.

Dual 1200-MHz to 2500-MHz Balanced Mixer includes LO buffer, IF amp, RF balun

The ADL5802 dual balanced mixer combines RF inputs in the 100-MHz to 6000-MHz range with a local oscillator (LO) to produce IF outputs in the LF to 600-MHz range. The highly linear doubly balanced passive mixer cores are preceded by fully differential RF and LO buffers, and are followed by fully differential IF amplifiers. With its low leakage, low intermodulation distortion, and high input linearity, the mixer is ideal for cellular base stations. The device specs include: 1.6-dB power conversion gain, 11-dB single-sideband noise figure, 28-dBm input third-order intercept (IP3), and 12-dBm input compression point (P1dB). Operating on a single 4.75‑V to 5.25-V supply, the ADL5802 consumes 220 mA when enabled and 170 mA when disabled. Available in a 24-lead LFCSP package, it is specified from –40°C to +85°C and priced at $7.55 in 1000s.

Pre-Release Products

February 2010

The ADA4092-4 quad micropower Operational Amplifier, with 45-μV offset, 2.5‑μV/°C offset drift, 80-dB common-mode rejection, 113-dB large-signal voltage gain, 112-dB power-supply rejection, 1.1-MHz bandwidth, 0.43-V/μs slew rate, and rail-to-rail input- and output swings, is ideal for industrial process control, portable communications equipment, power-supply control, and sensor signal conditioning. On-chip over-voltage protection prevents phase inversion and excessive input-current flow during transient- or fault conditions, reduces the number of external components needed to ensure stable operation, and simplifies system design and error analysis. The amplifier inputs are protected from voltages up to 12 V above and below the supply rails at ±15 V—and 25 V above and below the supply rails at ±5 V.

January 2010

The ADA4960-1 low-distortion, ultrahigh-speed Differential ADC Driver is optimized for driving 8- to 10-bit ADCs having sampling rates to 1 Gsps and beyond. The amplifier maintains a constant 10-kohm input resistance for externally settable gains from 6 dB to 15 dB, and has 150-ohm differential output resistance. Its specifications include 3-GHz bandwidth, 8000-V/μs slew rate, and 53-dBc SFDR at 1 GHz. An auxiliary unity-gain buffer can be used to buffer the common-mode input voltage or other low-frequency signal.

The AD7291 and AD7298 low-power 8-channel, 12-bit, 1-Msps Successive-Approximation ADCs include an input multiplexer, wideband track-and-hold amplifier, buffered 2.5-V reference, channel sequencer, and bandgap temperature sensor that provides 0.25°C resolution and ±2°C accuracy. The converters accept eight single-ended inputs within a 0 to 2.5-V range, and provide a 12-bit serial output. The AD7291 features a 2-wire I²C-compatible interface; the AD7298 has a 4-wire SPI-compatible interface.

The AD5541A serial-input, voltage-output nanoDAC^® Digital-to-Analog Converter provides 16‑bit resolution with ±0.5-LSB typical integral- and differential nonlinearity. With an external reference voltage that can range from 2 V to the supply voltage, the unbuffered voltage output can drive a 60-kilohm load from 0 V to V_REF. A low-power SPI-compatible serial interface can be clocked at up to 50 MHz. The AD5541A has logic power supply and load DAC inputs; it powers up to midscale. The AD5541A-1 has a clear input; it powers up to zero-scale.

The AD5512A/AD5542A serial-input, voltage-output 12-/16‑bit nanoDAC^® Digital-to-Analog Converters feature ±1-/4-LSB max integral nonlinearity and ±1-LSB max differential nonlinearity. With an external reference voltage that can range from 2 V to the supply voltage, they provide a 0-to-V_REF unipolar range or ±V_REF bipolar range; the unbuffered voltage output can drive a 60-kilohm load. A low-power SPI-compatible serial interface can be clocked at up to 50 MHz. The AD5512A/42A add a logic power supply, a load DAC input, and Kelvin sense pins. The AD5512A-1/42A-1 include a clear input. All models power up to midscale.

The ADSP-BF51x and ADSP-BF51xF Blackfin Processors—optimized for cost-sensitive applications including portable test equipment, embedded modems, biometrics, and consumer audio—combine the multimedia signal-processing power of a single-instruction, multiple-data (SIMD) DSP with the control capabilities of a RISC microcontroller. With two 16-bit MACs, two 40 bit ALUs, four 8-bit video ALUs, and 116K bytes of on-chip memory, they operate at up to 400 MHz. Peripherals, depending on model, include: IEEE 802.3-compliant 10/100 Ethernet MAC with IEEE 1588 support; DMA controller; removable-storage interface (RSI) controller; two-wire interface (TWI) controller; dual-channel, full-duplex synchronous serial ports (SPORTs) that support 8 channels of I²S stereo audio; UARTs; SPI port; general-purpose timers; watchdog timers; real-time clock; parallel peripheral interface (PPI), supporting ITU-R 656 video formats; rotary counter; 3-phase PWM pairs; and general-purpose I/Os. F-suffix devices add 4-Mbits of SPI flash memory. Lockbox™ security technology protects code and content. Dynamic power management adjusts the operating voltage and frequency, optimizing power consumption vs. performance for real-time applications. All Blackfin processors are supported by the VisualDSP++ software-development environment and the EZ-KIT Lite evaluation system.

The ADL5535 and ADL5536 IF Gain Blocks, with their extremely low noise and distortion, provide the highest dynamic range available from internally matched gain blocks that operate over the 20-MHz to 1-GHz range. The ADL5535 provides 15‑dB gain, with 47.6-dBm third-order intercept (OIP3), 19.1-dBm 1-dB compression point (P1dB), and 3.3-dB noise figure (NF) at 190 MHz, while drawing only 97 mA. The ADL5536 provides 20-dB gain, with 46.5-dBm OIP3, 19.8-dBm P1dB, and 2.8-dB NF at 380 MHz, while drawing only 100 mA. The amplifier inputs and outputs are internally matched to 50 ohms; and integrated active bias circuitry minimizes the need for external components.

Technical Articles

John Ardizzoni, Driving PIN Diodes: The Op-Amp Alternative, Analog Dialogue, 2/2/2010

Phillip Halford and Ed Balboni, Transmitter RFIC Integration for Next Generation Wireless Infrastructure Radios, Wireless Design and Development, 2/1/2010

Carlos Calvo, The differential-signal advantage for communications system design, RF Design Line, 2/1/2010

Austin Harney, Designing High-Performance Phase-Locked Loops with High-Voltage VCOs , Analog Dialogue, 12/1/2009

Webinars and Tutorials

Don't be Mean - be Root Mean Square! -- How do you measure a varying signal?

Quadrature and DC Correction for Direct Conversion Receivers --This webcast discusses the various wireless communication architectures with a focus on homodyne receiver challenges such as: DC offset, quadrature errors and even order distortions.

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