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Circuits from the Lab™ reference circuits are engineered and tested for quick and easy system integration to help solve today's analog, mixed-signal, and RF design challenges.
This dual-channel colorimeter, which features a modulated light source transmitter and a synchronous detector receiver, measures the ratio of light absorbed by the sample and reference containers at three different wavelengths, providing an efficient solution for many chemical analysis and environmental monitoring instruments that measure concentrations and characterize materials through absorption spectroscopy.
This complete, adjustment-free, linear variable differential transformer (LVDT) signal conditioning circuit can accurately measure linear displacement (position). It uses the AD598 LVDT signal conditioner, which integrates a sine wave oscillator and a power amplifier to generate the excitation signals that drive the primary side of the LVDT. The system has 82-dB dynamic range and 250-Hz bandwidth, making it ideal for precision industrial position and gauging applications. This Circuit Note discusses basic LVDT theory and the design steps used to optimize the circuit for a chosen bandwidth.
These circuits demonstrate proven and tested electromagnetic compatibility (EMC) compliant solutions for three protection levels for popular RS-485 communication ports using the ADM3485E transceiver. Each solution was tested and characterized to ensure that the dynamic interaction between the transceiver and the protection circuit components functions correctly together to protect against the electrostatic discharge (ESD), electrical fast transients (EFT), and surge immunity specified in IEC 61000-4-2, IEC 61000-4-4, and IEC 61000-4-5, respectively. The circuits offer proven protection for RS-485 interfaces using the ADM3485E to the ESD, EFT, and surge levels often encountered in harsh environments.
This circuit is a complete implementation of the analog portion of a broadband direct conversion transmitter (analog baseband in, RF out). It supports RF frequencies from 500 MHz to 4.4 GHz using a phase-locked loop (PLL) with a broadband, integrated voltage-controlled oscillator (VCO). Harmonic filtering of the local oscillator (LO) from the PLL ensures excellent quadrature accuracy, sideband suppression, and low EVM. Low noise, low dropout regulators (LDOs) ensure that the power management scheme has no adverse impact on phase noise and EVM. This combination of components represents industry leading direct conversion transmitter performance over a frequency range of 500 MHz to 4.4 GHz.
This complete, smart, industrial loop-powered field instrument has a 4-mA to 20-mA analog output and a highway addressable remote transducer (HART®) interface. HART is a digital 2-way communication in which a 1 mA peak-to-peak frequency-shift-keyed (FSK) signal is modulated on top of the standard 4-mA to 20-mA analog current signal. This allows features such as remote calibration, fault interrogation, and transmission of process variables in applications such as temperature and pressure control.
This broadband direct-conversion transmitter (analog baseband in, RF out) supports RF frequencies from 30 MHz to 2.2 GHz using a phase-locked loop (PLL) with an on-chip broadband voltage-controlled oscillator (VCO). Unlike modulators that use a divide-by-1 local oscillator (LO) stage, harmonic filtering of the LO is not required as long as the LO inputs to the modulator are driven differentially. The ADF4351 provides differential RF outputs and is, therefore, an excellent match. This PLL-to-modulator interface is useful for all I/Q modulators and I/Q demodulators that contain a 2XLO-based phase splitter.
It is important to provide fast, high-resolution conversions when sampling industrial signals. Previously, the highest resolution analog-to-digital converters (ADCs) available at sampling rates up to 500 kSPS were 14 bit to 18 bit. This single-supply system is optimized for sampling industrial-level signals with a 24-bit, 250 kSPS sigma- delta (Σ-Δ) ADC. Each of the two differential or four pseudo-differential channels can be scanned at a rate up to 50 kSPS with 17.2 bits of noise-free code resolution. This circuit solves the problem of acquiring and digitizing standard industrial signal levels of ±5 V, ±10 V, and 0 V to 10 V with precision low-voltage ADCs by using an innovative differential amplifier with internal laser trimmed resistors to perform the attenuation and level shifting.
This 16-bit, 100-kSPS successive-approximation analog-to-digital converter plus drive amplifier is optimized for low system power dissipation with input signals up to 1 kHz and sampling rates up to 100 kSPS. This approach, useful in battery powered or multichannel applications where power dissipation is critical, also provides benefits in applications where the ADC is idle between conversion bursts. Recommended drive amplifiers for high-performance successive-approximation ADCs typically handle a wide range of input frequencies, but applications that use a lower sampling rate can save considerable power by reducing the sampling rate and using a low-bandwidth, low-power driver. For input bandwidths up to 1 kHz and sampling rates of 100 kSPS, the AD8641 precision, low-power, JFET-input op amp offers 3‑MHz bandwidth, high signal-to-noise ratio, and low total harmonic distortion—and reduces total system power from 17.35 mW to 7.35 mW.
This 16-bit, 300-kSPS successive-approximation analog-to-digital converter plus drive amplifier is optimized for low system power dissipation with input signals up to 4 kHz and sampling rates up to 300 kSPS. This approach, useful in battery powered or multichannel applications where power dissipation is critical, also provides benefits in applications where the ADC is idle between conversion bursts. Recommended drive amplifiers for high-performance successive-approximation ADCs typically handle a wide range of input frequencies, but applications that use a lower sampling rate can save considerable power by reducing the sampling rate and using a low-bandwidth, low-power driver. For input bandwidths up to 4 kHz and sampling rates of 300 kSPS, the OP1177 precision, low-noise op amp offers 1.3 MHz bandwidth, high signal-to-noise ratio, and low total harmonic distortion—and reduces total system power from 18.75 mW to 10.75 mW.
This circuit is a highly integrated electrocardiogram (ECG) front end for use in battery powered patient monitoring applications. Used in a typical 5-lead (four limb and one precordial chest lead) ECG measurement system, it includes respiration and pace detection. This configuration is typical for portable telemetry ECG measurements or a minimum lead set from a line-powered bedside instrument. A typical ECG signal has 1‑mV amplitude when measured on the surface of the skin, thus requiring measurement sensitivity and noise in the microvolt level. The ultralow noise of the ADP151 linear regulator (9 μV rms from 10 Hz to 100 kHz), coupled with the power supply rejection of the ADAS1000, ensures low overall noise.
This combined 16-bit, 6-MSPS, successive-approximation (SAR) analog-to-digital converter (ADC) and differential-to-differential driver is optimized for low noise (88.6‑dB SNR), low distortion (−110 dBc THD), and low power dissipation. The SAR architecture can sample without latency, making it ideal for high-performance multiplexed data acquisition systems, such as portable digital x-ray systems and security scanners. The 6-MSPS sampling rate allows fast sampling of multiple channels, and the ADC has true 16-bit dc linearity and a LVDS interface for low pin count and low digital noise. The fast settling time (45 ns to 0.1%) of ADA4897-1 makes it ideal for multiplexed applications.
This circuit uses the ADuCM360 precision analog microcontroller in an accurate thermocouple temperature monitoring application to controls the 4-mA to 20-mA output current. The ADuCM360 integrates two 24-bit sigma-delta (Σ-Δ) analog-to-digital converters, two programmable current sources, a 12-bit digital-to-analog converter, a 1.2-V reference, an ARM Cortex-M3 core, 126 KB flash, 8 kB SRAM, and various digital peripherals, such as UART, timers, SPIs, and I2C interfaces. In the circuit, the ADuCM360 connects to a Type T thermocouple and a 100-Ω platinum resistance temperature detector, which is used for cold junction compensation. The low-power Cortex-M3 core converts the ADC readings to a real temperature value. The −200°C to +350°C Type T temperature range is converted to an output current range of 4 mA to 20 mA. The loop powered circuit operates with loop voltages up to 28 V to provide a complete solution for thermocouple measurements.
This flexible, highly integrated 8-channel, 16-bit, 1-MSPS data acquisition system includes a programmable-gain instrumentation amplifier capable of handling the full range of industrial signal levels. A single +5 V supply powers the circuit, and a high-efficiency, low-ripple boost converter generates the ±15 V that allows processing differential input signals up to ±24.576 V with ±2 LSB INL and ±0.5 LSB DNL. The circuit is based on the ADAS3022 complete 16-bit, 1-MSPS data-acquisition system that integrates an 8-channel, low-leakage multiplexer; a programmable-gain instrumentation amplifier stage; a precision, low-drift 4.096-V reference; a reference buffer; and a high-performance, no latency, 16-bit SAR ADC.
Many systems require multiple low jitter system clocks for mixed signal processing and timing. This circuit interfaces one differential output of the ADF4351 integrated phase-locked loop (PLL) and voltage-controlled oscillator (VCO) to the ADCLK948, which provides up to eight differential LVPECL outputs.
Whether an IQ modulator is used in a direct conversion application or as an upconverter to a first intermediate frequency (IF), some gain is generally applied directly after the IQ modulator. This circuit note describes how to choose an appropriate driver amplifier to provide the first stage of gain at the output of an IQ modulator. This circuit uses the ADL5375 IQ modulator and the ADL5320 driver amplifier, which are well matched from a system performance level. Because these devices are well matched in terms of their dynamic ranges, a simple direct connection between the IQ modulator and the RF driver amplifier is recommended without any need for attenuation between the devices.
This circuit incorporates a 3-axis ADXL362 digital accelerometer and an ADP195 high-side power switch to create an ultralow power, motion sensitive switch. The ADXL362 ultralow-power 3-axis accelerometer consumes less than 100 nA in wake-up mode. Unlike accelerometers that use power duty cycling to achieve low power consumption, it samples continuously at all data rates so it does not alias input signals by under sampling. The ADXL362 provides 12-bit output resolution and has three operating ranges, ±2 g, ±4 g, and ±8 g, with a resolution of 1 mg/LSB on the ±2 g range. For applications where a noise level lower than 480 μg/√Hz is desired, either of two lower noise modes (down to 120 μg/√Hz) can be selected at minimal increase in supply current. An on-chip, 12-bit temperature sensor is accurate to ±0.5°. The ADP195 high-side load switch, designed for operation between 1.1 V and 3.6 V, is protected against reverse current flow from output to input. The device contains a low on-resistance, P-channel MOSFET that supports over 1.1 A of continuous load current and minimizes power losses. This combination of devices offers an industry leading low power solution for a standalone motion switch controlling power to a load.
This circuit is a 75 MHz bandwidth receiver front end based on the ADL5202 wide dynamic range, high speed, digitally controlled variable gain amplifier (VGA) and the 14-bit, 250 MSPS AD9643 dual ADC. The fifth-order Butterworth antialiasing filter is optimized based on the performance and interface requirements of the amplifier and the ADC. The total insertion loss due to the filter network and other resistive components is approximately 2.3 dB. The overall circuit with the band-pass filter has a 1 dB bandwidth of 75 MHz (from 145 MHz to 220 MHz) and a 3 dB bandwidth of 110 MHz (from 120 MHz to 230 MHz). The pass-band flatness is 1 dB. The circuit is optimized to process a 75 MHz bandwidth IF signal centered at 182.5 MHz (second Nyquist zone) with a sampling rate of 245.76 MSPS. The signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) measured with a 182.5 MHz analog input across the 75 MHz band are 68.4 dBFS and 80.7 dBc, respectively.
Originally intended to carry LAN traffic, Cat-5e UTP cable is widely used in many other signal transmission applications because of its respectable performance and low cost. Signals transported over UTP cable suffer from three major impairments that degrade video quality: nonlinear bandlimiting, low-frequency loss, and delay skew. This circuit overcomes these impairments by using the AD8122 triple receiver/equalizer to restore the high frequency content of the video signals while also providing flat gain. The AD8120 triple skew-compensating analog delay line adds delay to the two earliest arriving signals such that the three received signals are properly aligned in time. The AD8147 triple driver provides the required single-ended-to-differential conversion of the source video signals.
This circuit provides a complete solution for converting HDMI/DVI to VGA (HDMI2VGA) with an analog audio output. Using the low-power ADV7611 HDMI receiver, it is capable of receiving video streams up to 165 MHz. Powered from a USB cable, it works for resolutions up to 1600 × 1200 at 60 Hz. The circuit uses EDID content to ensure that the video stream from the HDMI/ DVI source is at the highest possible resolution supported by the HDMI source, converter, and VGA display.
This circuit uses the ADuC7060 or the ADuC7061 precision analog microcontroller in an accurate thermocouple temperature monitoring application. The microcontrollers integrate dual 24-bit sigma-delta (Σ-Δ) analog-to-digital converters (ADCs), dual programmable current sources, a 14-bit digital-to-analog converter (DAC), and a 1.2 V internal reference—as well as an ARM7 core, 32 KB flash, 4 KB SRAM, UART, timers, serial peripheral interface (SPI), I2C interfaces, and various other digital peripherals. The ADuC7060/ ADuC7061 are connected to a thermocouple and a 100-Ω platinum resistance temperature detector (RTD), which is used for cold-junction compensation. As an extra option, the ADT7311 digital temperature sensor can measure the cold-junction temperature instead of the RTD.
This band-pass receiver front-end is based on the ADL5565 ultralow-noise differential amplifier driver and the AD9642 14-bit, 250-MSPS analog-to-digital converter (ADC). The third-order Butterworth antialiasing filter is optimized based on the performance and interface requirements of the amplifier and ADC. The total insertion loss due to the filter network and other components is only 5.8 dB. The overall circuit has a bandwidth of 18 MHz with a pass-band flatness of 3 dB. With a 127-MHz analog input, it features 71.7-dBFS signal-to-noise ratio (SNR) and 92-dBc spurious-free dynamic range (SFDR). The sampling frequency is 205 MSPS, thereby positioning the IF input signal in the second Nyquist zone between 102.5 MHz and 205 MHz.
This circuit provides a robust solution for receiving CBVS video signals in harsh environments, including integrated overvoltage protection. It uses the ADA4830-1 low-power differential receiver to convert a fully differential or pseudo differential video signal to a single-ended signal before being digitized by the ADV7180 video decoder.The ADA4830-1 eliminates the common-mode noise and phase noise caused by the ground potential differences between an incoming video signal source and the receive circuit. The circuit operates in the harsh automotive environment, detecting short-to-battery events and protecting from them.
This circuit provides an isolated LVDS interface that protects against fault conditions and improves robustness. The ADuM3442 4-channel digital isolator isolates the logic inputs to the ADN4663 LVDS driver and the logic outputs from the ADN4664 LVDS receiver. Together with the isolated power provided by the ADuM5000, it provides a complete solution for isolating a 2-channel LVDS line driver and a 2-channel LVDS receiver, enabling two complete transmit and receive paths on a single board.
This circuit uses the AD5700, the industry’s lowest power and smallest footprint HART®1-compliant IC modem, and the AD5422 16-bit current output and voltage output DAC to form a complete HART-compatible 4-mA to 20-mA solution. An OP184 op amp allows the IOUT and VOUT pins to be shorted together, thus reducing the number of screw connections required in programmable logic control (PLC) module applications. For additional space savings, the AD5700-1 offers a 0.5% precision internal oscillator.
This circuit is a complete thermocouple signal-conditioning circuit with cold-junction compensation followed by a 16-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC). The AD8495 thermocouple amplifier provides a simple, low-cost solution for measuring K-type thermocouple temperatures, including cold-junction compensation. Its fixed-gain instrumentation amplifier scales the small thermocouple voltage to provide a 5 mV/°C output. The amplifier’s high common-mode rejection blocks common-mode noise picked up by the long thermocouple leads. For additional protection, its high-impedance inputs make it easy to add extra filtering. The AD8476 differential amplifier provides the correct signal levels and common-mode voltage to drive the AD7790 16-bit, Σ-Δ ADC, providing a compact, low-cost solution for thermocouple signal conditioning and high-resolution analog-to-digital conversion.
This circuit pairs a ADV7391 digital-to-analog video converter with an ADA4432-1 low-cost, low-power, fully integrated video reconstruction filter with output short-to-battery (STB) protection, making it ideal for CVBS video transmission in harsh infotainment environments, such as automotive applications. Although many video DACs can drive video loads directly, it is often beneficial to use a video driver at the output of a video encoder for power savings, filtering, line driving, and overvoltage circuit protection. The video driver, typically configured as an active filter (reconstruction filter), blocks the higher frequency components (above the Nyquist frequency) introduced into the video signal as part of the sampling process, and provides gain to drive the external 75-Ω cable to the video display. In addition, it offers overvoltage protection and hardened ESD tolerance, along with excellent video specifications, low power consumption, and wire diagnostic features.
This flexible signal-conditioning circuit processes wide dynamic range signals that vary from several mV p-p to 20 V p-p. Providing the necessary conditioning and level shifting, it achieves the dynamic range using the internal programmable-gain amplifier (PGA) of the high-resolution analog-to-digital converter (ADC). A ±10-V full-scale signal is typical in process control and industrial automation applications, so attenuation and level shifting are necessary to process these signals with modern low-voltage ADCs. In some situations, however, the signal can be as small as several mV, so amplification is needed to fully use the dynamic range of the ADC. Therefore, a programmable-gain function is desirable when the input signal varies over a wide range. In addition, small signals may have large common-mode voltage swings, so high common-mode rejection (CMR) is required. In some applications, where the source impedance is large, high impedance is also necessary for the analog front-end input circuit.
This circuit, which provides a precision 16-bit, low drift bipolar voltage output in the ±2.5‑V range, operates on a single 10-V to 15-V supply. The unipolar voltage outputs of the AD5668 octal denseDAC are amplified and level shifted by the AD8638 auto-zero op amps. The maximum drift contribution of the AD8638 is only 0.06 ppm/°C. The external REF192 reference ensures a maximum drift of 5 ppm/°C and provides a low impedance pseudo ground for the AD8638 level gain and shifting circuit. The circuit offers an efficient solution to a problem often encountered in systems with a single 12‑V supply rail. Proper printed circuit board (PCB) layout and grounding techniques ensure that the ADP2300 switching regulator does not degrade the overall performance.
This circuit uses the
AD5700 modem and the
AD5420 16-bit current-output
DAC to form a complete HART-compatible 4-mA to 20-mA solution that adheres
to HART physical layer specifications including analog rate of change and
noise during silence. For many years, 4-mA to 20-mA communication has been
used in process-control instrumentation because it is reliable, robust,
and insensitive to environmental interference over long communication
distances, but, it only allows one-way communication of one process
variable at a time. The highway addressable remote transducer (HART)
standard overcomes this limitation, providing two-way digital
communication along with 4‑mA to 20‑mA analog signaling used by
traditional instrumentation equipment, and enabling remote calibration,
fault interrogation, and transmission of additional process variables.
HART communications modulates a 1-mA peak-to-peak frequency-shift-keyed
(FSK) signal on top of the
This circuit uses the ADuCM360/ADuCM361 precision analog microcontroller in an accurate thermocouple temperature-monitoring application. The ADuCM36x integrate dual 24-bit sigma-delta (Σ-Δ) analog-to-digital converters (ADCs), dual programmable current sources, a 12-bit digital-to-analog converter (DAC), a 1.2-V internal reference, an ARM Cortex-M3 core, 126 KB flash, 8 KB SRAM, and various digital peripherals such as UART, timers, SPIs, and I2C interfaces. The ADuCM36x is connected to a thermocouple and a 100-Ω platinum resistance temperature detector (RTD), which is used for cold-junction compensation. With a 4-Hz ADC sampling rate and gain of 32, the noise-free code resolution is greater than 18 bits.
This circuit provides a 16-bit, 250-MSPS, narrow-band, high-IF receiver front-end with an optimum interface between the ADL5565 differential amplifier with high input bandwidth, low distortion, and high output linearity and the AD9467 buffered-input 16-bit, 250-MSPS ADC with 75.5-dBFS SNR and 98‑dBFS. The systematic procedure for designing the interface circuit and antialiasing filter described here maintains high performance and ensures minimal signal loss. A resonant approach is used to design a maximally flat Butterworth fourth-order band-pass filter with 200-MHz center frequency.
Most systems trade performance for low power. This
circuit achieves both low power (8 mW typical) and high performance in a
This circuit provides a highly integrated, cost effective, 8-channel, 16-bit, 250 kSPS data acquisition system that can digitize ±10-V industrial level signals. It provides 2500 V rms isolation between the measurement circuit and the host controller, and is powered from a single isolated PWM-controlled 5-V supply.
This circuit provides robust battery monitoring in industrial, process automation, and other environments where transients are likely to occur. Using two ADG5408 8-channel CMOS multiplexers and an AD8226 instrumentation amplifier, it provides accurate voltage monitoring of individual cells at low power and low cost, and requires no additional external transient protection circuitry.
This circuit implements a flexible, frequency agile IF-to-baseband receiver. Variable IF and baseband gains adjust the signal level. The ADRF6510 baseband ADC driver includes a programmable low-pass filter that eliminates out-of-channel blockers and noise. The filter bandwidth can be dynamically adjusted as the bandwidth of the input signal changes, ensuring that the available dynamic range of the ADC is fully used. The core of the circuit is an IQ demodulator. The 2×LO-based phase-splitting architecture of the ADL5387 allows for operation over a wide frequency range. Precise quadrature balance and low output dc offsets ensure minimal degradation of the error vector magnitude (EVM). This fully differential circuit provides compatible bias levels where dc coupling is required between stages.
This circuit uses the ADF4350 synthesizer with integrated VCO plus an ADF4153 or ADF4157 PLL to minimize spurious outputs by isolating the PLL synthesizer circuitry from the VCO circuit. Due to the close proximity of the PLL circuitry to the VCO, devices with integrated PLLs and VCOs often have feed through from the digital PLL circuitry to the VCO, leading to higher spurious levels. The ADF4350 fully integrated fractional-N PLL and VCO can generate frequencies from 137.5 MHz to 4400 MHz. In addition to improved spurious performance, using an external PLL can increase frequency resolution to 0.7 Hz.
This flexible, multichannel analog output solution meets most requirements for multichannel I/O cards, programmable logic controllers, and distributed control systems. Combining the AD5686R quad, 16-bit, buffered-output nanoDAC+ D/A converter with four AD5750-2 industrial current/voltage output drivers, it provides all typical output current and voltage ranges with 16-bit resolution, no missing codes, 0.05% linearity, and less than 0.1% output error. An on-chip ultralow drift (2 ppm/°C typical), 2.5-V voltage reference with high drive capability (up to ±5 mA) provides the reference voltage for both the AD5686R and the AD5750-2, guaranteeing low noise, high accuracy, and low temperature drift. The ADuM1301 and ADuM5400 provide 2500 V rms signal and power isolation between the analog signal chain and the host controller.
This circuit is a single-supply, low-power window detector with programmable upper and lower limits. This type of circuit, popular in detection and monitoring applications, can generate an alarm if a signal falls outside the preset limits. The AD5668-1 octal, low-power, 16-bit, buffered voltage-output DAC sets the limits of the window. It includes a, 1.25-V, 5-ppm/°C reference, giving a full-scale output range of 0 V to 2.5 V. The comparator is an ADCMP370 general-purpose, low-power comparator (20 μW typical at 5 V) with an input offset voltage of 9-mV maximum and an open-drain output.
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