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Volume 49 ó March 2015

Timely Information

Application Notes

Circuits from the Lab

EngineerZone

New-Product Briefs

Rarely Asked Questions

Technical Articles

  

Products

Amplifiers

Analog-to-Digital Converters

Application Specific

Audio and Video Products

Broadband

Clock and Timing

Digital-to-Analog Converters

Interface and Isolation

Linear Products

MEMS

Optical

Power Management

Processors and DSP

RF and Microwave

Sensors

Switches and Multiplexers

  

Analog Dialogue--Since 1967

Feature Articles: Products, Applications, Technology, Design Ideas, Tutorials, and Measurement Techniques

FPGA-Based Systems Increase Motor-Control Performance

Advanced motor-control systems combine control algorithms, industrial networks, and user interfaces, so they require additional processing power to execute all tasks in real time. Multichip architectures are used to implement modern motor-control systems: a DSP executes motor-control algorithms; an FPGA implements high-speed I/O and networking protocols; a microprocessor handles executive control.

Powering ICs On and Off

Modern integrated circuits employ sophisticated circuits to ensure that they turn on in a known state; and preserve memory, boot quickly, and conserve power when they are powered down. This two-part article provides tips for using power-on reset and power-down functions.

reference

Isnít that gain specification a bit lopsided?

Can you explain why the minimum and maximum gain errors specified by my ADC differ so much?

Design a PLL Loop Filter When Only the Zero Resistor and Capacitor are Adjustable

A standard procedure uses open-loop bandwidth and phase margin to determine the component values for a  PLL loop filter, solving for the pole capacitor and deriving the remaining values. In some cases this capacitor may be integrated, so the standard procedure can't be used. This article proposes an alternative procedure that can be used when the value of the pole capacitor is fixed.

Quickly Implement JESD204B on a Xilinx FPGA

The JESD204 high-speed serial interface connects data converters to logic devices. As the speed and resolution of converters continues to increase, this interface has become common in ADCs, DACs, and RF transceivers. Serializer/deserializer designs in FPGAs implement the physical layer. This article describes how to quickly set up a project using a Xilinx FPGA to implement the JESD204B interface.

voltage reference

Choosing References

So how do I choose a voltage reference?

...Recent Articles

Timeless Information

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Applications

Aerospace and Defense

Automotive

Building Technology

Communications

Consumer

Energy

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Instrumentation and Measurement

Motor and Power Control

Process Control and Industrial Automation

Securitry and Surveillance

 

 

 

 

 

Analog Dialogue is the technical magazine of Analog Devices. It discusses products, applications, technology, and techniques for analog, digital and mixed-signal processing.

Copyright 1995- Analog Devices, Inc. All rights reserved.          ISSN 1552-3284