The ADP7118 is a CMOS, low dropout linear regulator that operates from 2.7 V to 20 V and provide up to 200 mA of output current. These high input voltage LDOs are ideal for regulation of high performance analog and mixed signal circuits operating from 40 V down to 1.2 V rails. Using an advanced proprietary architecture, they provide high power supply rejection, low noise, and achieve excellent line and load transient response with just a small 2.2 μF ceramic output capacitor.
The ADP7118 is available in 16 fixed output voltage options. Each fixed output voltage may be adjusted above the initial set point with an external feedback divider. This allows the ADP7118 to provide an output voltage from 1.2 V to VOUT - VDO with high PSRR and low noise.
User programmable soft start with an external capacitor is available in the LFCSP and SOIC packages.
The ADP7118 regulator output noise is 11 μVrms independent of the output voltage for the fixed options of 5V or less. The ADP7118 is available in a 6-lead, 2 mm × 2 mm LFCSP making them not only very compact solutions, but also providing excellent thermal performance for applications requiring up to 200 mA of output current in a small, low-profile footprint. The ADP7118 is also available in a 5-lead TSOT and an 8-lead SOIC.
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|ADP7118: 20 V, 200 mA, Low Noise, CMOS LDO Preliminary Data Sheet (Rev PrD, 03/2014) (pdf, 1025 kB)||Data Sheets|
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