ADM7150

• Metrology subsystem plus selected other features of a level 2, 7kW to 22kW electric vehicle supply equipment (EVSE)
• Full-featured board for ADE9112, ADE9113, and ADE9178
• Rated up to three phase, 240V RMS line to neutral voltage
• Rated up to 32A current measurement with on-board shunts
• Supports up to 22kW combined power transfer to load
• Features MAX32672 low power, secure microcontroller
• Supports LCD display for energy and state updates
• Supports MODBUS™ protocol over RS-485 communication interface
• Supports Protobuf™ messages to communicate with EVerest open source software (OSS)
• IEC61851-compatible state machine implementation

The AD-ACEVSE22KWZ-KIT is a reference design for the metrology subsystem plus selected other features of a level 2, 7 kW to 22 kW AC electric vehicle supply equipment (EVSE). It includes the ADE9113 isolated Σ-Δ analog-to-digital converter (ADC) coupled with the ADE9178 metrology DSP to accurately measure energy delivered to an electric vehicle (EV). It includes the MAX32672 ultralow- power ARM^® Cortex^®-M4 processor, a cost-effective, highly integrated, and highly reliable 32-bit microcontroller to accumulate energy measurements and securely send it to a host for display. A charge control state machine is run on the microcontroller to transition through different charge states when a charging plug is inserted into an electric vehicle. The kit includes a flexible printed circuit (FPC) connector and LCD to read the energy measurements and state transitions during a charging cycle. The power input/output, control pilot (CP), and proximity pilot (PP) signals are exposed on connectors at the edge of the board. The energy delivered to the EV is measured as a voltage drop across shunts and a resistor ladder network, which makes it easy to set up the boards in the field.

• Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption 
• Avoids image rejection issues and unwanted mixing 

The AD-FMCOMMS6-EBZ eval board is a 400MHz to 4.4GHz receiver based on the AD9652 dual 16bit analog to digital converter, the ADL5566 High Dynamic Range RF/IF Dual Differential Amplifier and the ADL5380 quadrature demodulator.

This is an I and Q demodulation approach to direct convert (also known as a homodyne or zero IF) receiver architecture. Direct conversion radios perform just one frequency translation compared to a super-heterodyne receiver that can perform several frequency translations. One frequency translation is advantageous because it:

• Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption
• Avoids image rejection issues and unwanted mixing

This topology will provide image rejection and early implementation of the differential signal environment. There is an amplification stage to maintain the full-scale input to the ACD. The local oscillator and ADC clock are on board and share the same reference signal prevent smearing. The form factor is VITA57 compliant and all of the DC power is routed from the data capture board through an FMC connector. This evaluation board demonstrates a high performance receiver signal chain aimed at military and commercial radar using “commercial off the shelf” (COTS) components. The overall circuit has a bandwidth of 220MHz with a pass band flatness of +/_ 1.0 dB. The SNR and SFDR measured at an IF of 145MHz are 64dB and 75dBc, respectively.

• Designed to cover full Tx signal chains with integrated MCU and user-friendly GUI for faster and easier integration
• Supports fault event protection - overvoltage (OV), overcurrent (OC), and overtemperature (OT)
• Supports ultrafast sub-µs GaN gate voltage switching ~ (<1 µs)
• Supports ultrafast (<10 µs) fault event protection from detection up to GaN gate pinch-off
• Wide range of gate bias voltages from -10 V to +10 V
• Configurable power-up and power-down sequence

The AD-PAARRAY3552R-SL reference design provides control, protection, and proper biasing sequence for GaN power amplifier (PA) arrays. The design incorporates the AD3553R high-speed, dual-channel, 16-bit DAC to support the ultrafast sub-µs voltage settling time of GaN gates.

Key fault events, including overvoltage, overcurrent, and overtemperature, are effectively managed by the LTC7000, a static switch driver responsible for system fault protection.

The on-board MAX32666 ultralow-power ARM^® Cortex^®-M4 microprocessor provides essential debug and programming features for a comprehensive software development experience with the system. The system's firmware is built on ADI's open-source no-OS framework and includes a user-friendly graphical interface (GUI) for evaluation. Updates are easily applied through an SWD UART bootloader, streamlining prototyping.

The system can be powered by an external +48 V supply, requiring high current capabilities.

APPLICATIONS

• 5G massive MIMOs
• Macro base stations

• TX
  • 16-bit 12GSPS RFDAC
  • JESD204B Interface
    • 8 lanes up to 12.5Gbps
  • 1x/2x/4x/6x/8x/12x/16x/24x/32x Interpolation
  • 64-bit NCO at max rate
  • Analog Modes of Operation:
    • Normal Mode: 6GSPS DAC rate
      • Synthesis up to 2.5GHz (1st Nyquist)
    • Mix Mode: 6GSPS DAC rate
      • Synthesis in 2nd & 3rd Nyquist zones
    • 2X Normal Mode: 12GSPS DAC rate
      • Synthesis up to 6GHz (1st Nyquist)
    • Excellent dynamic performance
• RX
  • 3.2GHz full power bandwidth at 2.5GSPS
    • Noise Density = -149.5dBFs/Hz, ENOB = 9.5 bits
    • SFDR = 77 dBc at 1GHz Ain (2.5Gsps)
    • SFDR = 77dBc at 1.8GHz Ain (2.5Gsps)
  • +/-0.3 LSB DNL, +/-1.0 LSB INL
  • Dual supplies : 1.3V and 2.5V
  • 8 or 6 Lane JESD204B Outputs
  • Programmable clipping threshold for Fast Detect output
  • Two Integrated wide band digital down converters (DDC) per channel
    • 10-bit complex NCO
    • 2 cascaded half band filters (dec/8, dec/16)
  • Timestamp for synchronous processing alignment
    • SYSREF Setup/Hold detector
  • Programmable Interrupt (IRQ) event monitor

The AD-FMComms11-EBZ board is a system platform board for communication infrastructure applications that demonstrates the Direct to RF (DRF) transmitter and observation receiver architecture. Using high sample rate RFDAC(s) and RFADC(s), a number of components in previous generation transmitters can be eliminated, such as mixers, modulators, IF amplifiers and filters. The objective being to bring the ADC or DAC as close to the antenna as possible, leading to possibly more cost effective and efficient communications solution.

It is composed of multi-GSPS RF ADC and DAC, AD9625 and AD9162 respectively. The transmit path contains a balun, low pass filter, gain block and variable attenuation to produce an output appropriate for a power amplifier module. Along the observation path, the PA output is coupled back into the board through a variable attenuator, a balun and finally the ADC. Clock management is taken care of on board; all the necessary clocks are generated from a reference. Power management is present as well.

• 10 GHz to 10.5 GHZ Beamsteering Platform
• 360 degree Phase Shift w/ 2.8 Degree Resolution
• 31 dB Amplitude Tuning Range w/ 0.5 dB Resolution.
• 8-Element Linear Array Antenna
• Digitized with PlutoSDR
• Runs directly on a Raspberry Pi

• 5.8 GHz RF Power Amplifier
• 24 dB of Gain
• 50 Ohm matched SMA Input and Output Connectors
• Over Temperature Monitoring
• USB Powered

• Translation Loop Synthesizer 
• 5GHz to 5.4GHz RF Output 
• Low Phase Noise

• 23.5 dB Gain
• 5.8 GHz Optimized LNA
• ISM Band Operation
• USB Powered

• +26 dB of Rx Signal Gain
• 50 ohm Input and Output Impedance
• Overvoltage Input Protection
• SMA Input and Output Connectors
• USB Powered

• DC to 5.5 GHz Single Tone Generator
• +/- 0.5 dB  Wideband Amplitude Calibration from 0 dBm to -40 dBm
• 48-Bit Frequency Tuning Resolution (~43 uHz)
• Onboard VCXO for Quick Bring Up
• Compatible with Raspberry Pi 3B+, 4, Zero W, Zero 2W

• +25 dB of Rx Signal Gain
• 50 ohm Input and Output Impedance
• Overvoltage Input Protection
• SMA Input and Output Connectors
• USB Powered

The CN0565 is scheduled for obsolescence; for continued reference to this design, please see application note AN-2632. The recommended alternative for this is the AD-IMP2501-SL.

• Up to 24 Input Electrodes, Software Selectable;
• 2-wire or 4-wire Electrode Configuration Supported
• Real and Imaginary Measurements up to 200 kHz
• Open Source Image Recreation Algorithms
• Isolated Power and Digital Domains from the Host
• Arduino Form Factor Compatible

• Complete 2-Port Vector Network Analyzer
• Frequency range from 1.7 GHz to 3.4 GHz
• Zero-IF System Architecture