ADL5566
Info : RECOMMENDED FOR NEW DESIGNS
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ADL5566

4.5 GHz Ultrahigh Dynamic Range, Dual Differential Amplifier

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Info : RECOMMENDED FOR NEW DESIGNS tooltip
Info : RECOMMENDED FOR NEW DESIGNS tooltip
Part Details
Features
  • −3 dB bandwidth of 4.5 GHz (AV = 16 dB)
  • Fixed 16 dB gain
  • Channel-to-channel gain error: 0.1 dB at 100 MHz
  • Channel-to-channel phase error: 0.06° at 100 MHz
  • Differential or single-ended input to differential output
  • I/O dc-coupled or ac-coupled
  • Low noise input stage: 1.3 nV/√Hz RTI at AV = 16 dB
  • Low broadband distortion (AV = 16 dB), supply = 5 V
    • 10 MHz: −103 dBc (HD2), −107 dBc (HD3)
    • 100 MHz: −95 dBc (HD2), −100 dBc (HD3)
    • 200 MHz: −94.5 dBc (HD2), −87 dBc (HD3)
    • 500 MHz: −83 dBc (HD2), −64 dBc (HD3)
  • IMD3 of −95 dBc at 200 MHz center
  • Maintains low single-ended distortion performance out to 500 MHz
  • Slew rate: 16 V/ns
  • Maintains low distortion down to 1.2 V VCOM
  • Fixed 16 dB gain can be reduced by adding external resistors
  • Fast settling and overdrive recovery of 2.5 ns
  • Single-supply operation: 2.8 V to 5.2 V
  • Power-down
  • Low dc power consumption, 462 mW at 3.3 V supply
Additional Details
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The ADL5566 is a high performance, dual differential amplifier optimized for IF and dc applications. The amplifier offers low noise of 1.3 nV/√Hz and excellent distortion performance over a wide frequency range, making it an ideal driver for high speed 16-bit analog-to-digital converters (ADCs). The ADL5566 is ideally suited for use in high performance, zero IF/complex IF receiver designs. In addition, this device has excellent low distortion for single-ended input drive applications.

The ADL5566 provides a gain of 16 dB. For the single-ended input configuration, the gain is reduced to 14 dB. Using two external series resistors for each amplifier expands the gain flexibility of the amplifier and allows for any gain selection from 0 dB to 16 dB for a differential input and 0 dB to 14 dB for a single-ended input. In addition, this device maintains low distortion down to output (VOCM) levels of 1.2 V providing an added capability for driving CMOS ADCs at ac levels up to 2 V p-p.

The quiescent current of the ADL5566, using a 3.3 V supply, is typically 70 mA per amplifier. When disabled, it consumes less than 3.5 mA per amplifier and has −25 dB of input to output isolation at 100 MHz.

The device is optimized for wideband, low distortion, and noise performance, giving it unprecedented performance for overall spurious-free dynamic range (SFDR). These attributes, together with the adjustable gain capability, make this device the amplifier of choice for driving a wide variety of ADCs, mixers, pin diode attenuators, SAW filters, and multi-element discrete devices.

Fabricated on an Analog Devices, Inc., high speed SiGe process, the ADL5566 is supplied in a compact 4 mm × 4 mm, 24-lead LFCSP package and operates over the −40°C to +85°C temperature range.

Applications

  • Differential ADC drivers
  • Single-ended to differential conversion
  • RF/IF gain blocks
  • SAW filter interfacing

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Documentation
Software & Part Ecosystem

Software & Part Ecosystem

Evaluation Kit

Evaluation Kits 2

EVAL-ADL5566

ADL5566 Evaluation Board

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EVAL-ADL5566

ADL5566 Evaluation Board

ADL5566 Evaluation Board

Product Detail

ADL5566-EVALZ is a fully populated, 4-layer, FR4-based evaluation board. For normal operation it requires a single 3 V - 5 V/100 mA power supply. The power supply should be connected to the test loops labeled VCC and GND. The RF input signals are applied to the SMA connectors labeled VIN1 and VIP2. The RF outputs are available at the SMA connectors labeled VOP1 and VON2. The evaluation board may be converted to a fully differential input and output by installing SMA connectors VIP1, VIN2, VON1, VOP2, and removing R3, R4, R25, R26, installing 0 Ω jumpers R1, R2, R27, R26, removing transformers, T1, T2, T3, T4, and placing jumpers across the transformer pads. The 3 pin headers, ENBL_1 and ENBL_2 control the enable function. Test loops, VCOM-1 and VCOM-2 provide an interface for adjusting the common mode voltage.

Resources

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AD-FMCOMMS6-EBZ

AD-FMCOMMS6-EBZ Evaluation Board

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AD-FMCOMMS6-EBZ

AD-FMCOMMS6-EBZ Evaluation Board

AD-FMCOMMS6-EBZ Evaluation Board

Features and Benefits

  • Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption 
  • Avoids image rejection issues and unwanted mixing 

Product Detail

The AD-FMCOMMS6-EBZ eval board is a 400MHz to 4.4GHz receiver based on the AD9652 dual 16bit analog to digital converter, the ADL5566 High Dynamic Range RF/IF Dual Differential Amplifier and the ADL5380 quadrature demodulator.

This is an I and Q demodulation approach to direct convert (also known as a homodyne or zero IF) receiver architecture. Direct conversion radios perform just one frequency translation compared to a super-heterodyne receiver that can perform several frequency translations. One frequency translation is advantageous because it:

  • Reduces receiver complexity and the number of stages needed, increasing performance and reducing power consumption
  • Avoids image rejection issues and unwanted mixing


This topology will provide image rejection and early implementation of the differential signal environment. There is an amplification stage to maintain the full-scale input to the ACD. The local oscillator and ADC clock are on board and share the same reference signal prevent smearing. The form factor is VITA57 compliant and all of the DC power is routed from the data capture board through an FMC connector. This evaluation board demonstrates a high performance receiver signal chain aimed at military and commercial radar using “commercial off the shelf” (COTS) components. The overall circuit has a bandwidth of 220MHz with a pass band flatness of +/_ 1.0 dB. The SNR and SFDR measured at an IF of 145MHz are 64dB and 75dBc, respectively.


Tools & Simulations

Tools & Simulations 3

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