JESD204 Serial Interface JEDEC Standard for Data Converters

JESD204 Serial Interface JEDEC Standard for Data Converters

The JESD204 and the JESD204B revision data converter serial interface standard was created through the JEDEC committee to standardize and reduce the number of data inputs/outputs between high-speed data converters and other devices, such as FPGAs (field-programmable gate arrays). Fewer interconnects simplifies layout and allows smaller form factor realization without impacting overall system performance. These attributes are important to address the system size and cost constraints of a range of high speed ADC applications, including wireless infrastructure (GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA) transceiver architectures, software-defined radios, portable instrumentation, medical ultrasound equipment, and Mil/Aero applications such as radar and secure communications. Analog Devices is an original participating member of the JEDEC JESD204 standards committee and we have concurrently developed compliant data converter technology and tools, and a comprehensive product roadmap to fully enable our customers to take advantage of this significant interfacing breakthrough.

Learn more about JESD204B. Get the JESD204B information you need by downloading one document. Download the JESD204B Survival Guide. (pdf)


Engineer Zone

JESD204-Compatible Data Conversion Products

  • AD9144

    The AD9144 is a quad, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a maximum sample rate of 2.8 GSPS, permitting a multicarrier generation up to the Nyquist frequency. The DAC outputs are optimized to interface seamlessly with the ADRF672x analog quadrature modulators (AQMs) from Analog Devices, Inc. An optional 3-wire or 4-wire serial port interface (SPI) provides MoreRead more

    AD9144 Diagram

    - Quad, 16-Bit, 2.8 GSPS, TxDAC+® Digital-to-Analog Converter

  • AD9625

    The AD9625 is a 12-bit monolithic sampling analog-to-digital converter (ADC) that operates at conversion rates of up to 2.5 giga samples per second (GSPS). This product is designed for sampling wide bandwidth analog signals up to the second Nyquist zone. The combination of wide input bandwidth, high sampling rate, and excellent linearity of the AD9625 is ideally suited for spectrum analyzers, data MoreRead more

    AD9625 Diagram

    - 12-Bit, 2.0/2.5 GSPS, 1.3 V/2.5 V Analog-to-Digital Converter

  • AD9680

    The AD9680 is a dual, 14-bit, 1 GSPS analog-to-digital converter (ADC). The device has an on-chip buffer and sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed for sampling wide bandwidth analog signals of up to 2 GHz. The AD9680 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small MoreRead more

    AD9680 Diagram

    - 14-Bit, 1000 MSPS JESD204B, Dual Analog-to-Digital Converter

  • AD9656

    The AD9656 is a quad, 16-bit, 125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.

    The ADC requires a single 1.8 V MoreRead more

    AD9656 Diagram

    - Quad, 16-Bit, 125 MSPS JESD204B 1.8 V Analog-to-Digital Converter


Three-Part Video Series

JESD204B and Why It Should Matter to You (Part 1 of 3)

 

Rapid JESD204B Data Converter-to-FPGA Prototyping (Part 2 of 3)

Implementing JESD204B A/D Converters-to-FPGA Designs (Part 3 of 3)

Technical Webcast Series

JESD204B High-speed Serial Data Interface Analog Devices, Inc., Staff Applications Engineer Del Jones, provides in-depth explanation and design analysis of the key aspects of JESD204B high-speed serial interface technology. JESD204B brings compelling advantages in interface standardization and simplification, higher data rate capability, multi-channel synchronization, and deterministic latency, and it is available today in ADI’s latest high-speed ADC,s DAC’s and wideband RF transceivers. In four technical webinar sessions, you’ll get the essentials for understanding and implementing this new interface technology.

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