New Content (1)
Features and Benefits
- Flexible reconfigurable common platform design
- 4 DAC cores connected to various DSP and bypass datapaths
- Supports single, dual, and quad band
- Datapaths and DSP blocks are fully bypassable
- On-chip PLL with multichip synchronization
- External RF clock input option for off chip PLL
- Maximum DAC sample rate up to 12 GSPS
- Maximum data rate up to 12 GSPS using JESD204C
- Useable analog bandwidth to 8 GHz
- DAC ac performance at 12 GSPS
- Full-scale output current range: 7 mA to 40 mA
- Two tone IMD3 (−7 dBFS per tone): −78.9 dBc
- Noise spectral density (NSD), single tone at 3.7 GHz: −155.1 dBc/Hz
- Spurious free dynamic range (SFDR), single tone at 3.7 GHz: −70 dBc
- Versatile digital features
- Selectable interpolation filters
- Configurable digital up conversion (DUC)
- 8 fine complex DUCs and 4 coarse complex DUCs
- 48-bit numerically controlled oscillator (NCO) per DUC
- Option to bypass fine and coarse DUC
- Programable delay per data path
- Transmit digital predistortion (DPD) support
- Fine DUC channel gain control and delay adjust
- Programmable 192 tap PFIR filter for receive equalization
- Supports 4 different profile settings loaded via GPIO
- Receive automatic gain control (AGC) support
- Fast detect with low latency for fast AGC control
- Signal monitor for slow AGC control
- Dedicated AGC support pins
- Auxiliary features
- Fast frequency hopping
- Direct digital synthesis (DDS)
- Low latency digital loopback mode (receive datapath
- NCOs can be routed to transmit datapaths
- Power amplifier downstream protection circuitry
- On-chip temperature monitoring unit
- Flexible GPIOx pins
- TDD power savings option
- SERDES JESD204B/JESD204C interface
- 8 lanes up to 24.75 Gbps
- JESD204B compatible with the maximum 15.5 Gbps
- JESD204C compatible with the maximum 24.75 Gbps
- Supports real or complex digital data (8-bit, 12-bit, 16-bit, or 24-bit)
- 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch
The AD9177 is a highly integrated device with four, 16-bit, 12 GSPS maximum sample rate, RF digital-to-analog converter (DAC) cores, supporting up to eight baseband channels. The device is well suited for applications requiring wideband DACs to process signal(s) of wide instantaneous bandwidth. The device features an 8 lane, 24.75 Gbps JESD204C or 15.5 Gbps JESD204B data receiver port, an on-chip clock multiplier, and digital signal processing (DSP) features targeted at either wideband or multiband direct to RF applications. The DSP datapaths may be bypassed to allow a direct connection between the DAC cores and the data receiver port. The device also features frequency hopping modes and datapath mux configurations useful for phase array radar systems and electronic warfare applications.
- Wireless communications infrastructure
- Microwave point-to-point, E-band, and 5G mm wave Broadband communications systems
- Data over cable service interface specification (DOCSIS) 3.1
and 4.0 cable modem termination system (CMTS)
- Phased array radar and electronic warfare
- Electronic test and measurement systems
Product Lifecycle Pre-Release
This product is new and engineering validation may still be underway. Quantities may be limited and design specifications may change while we ready the product for release to production.
Evaluation Kits (2)
The AD9081-FMCA-EBZ evaluation board includes all of the support circuitry required to operate the AD9081 in various modes and configurations. The application software used to interface with the device is also described. The AD9081-FMCA-EBZ evaluation board connects to the Analog Devices, Inc., ADS9-V2EBZ for evaluation with the ACE software. The boards can also interface to commercially available field-programmable gate array (FPGA) development boards from Xilinx® or Intel®. Information on how to use these platforms to evaluate the AD9081 or AD9082 is available in the Using the AD-FMC-SDCARD section.
The ACE software allows the user to set up the AD9081 or AD9082 in various modes, and capture analog-to-digital converter (ADC) data for analysis. The DPGDownloaderLite software generates and transmits vectors to the DACs, which can then be sent to a spectrum analyzer for further analysis. For more details, see the AD9081 and AD9082 data sheets, which must be consulted in conjunction with this user guide when using the evaluation boards.
Features & Benefits
- Fully functional evaluation boards for the AD9081
- PC software for control with ACE software
- On-board clocking provided by the HMC7044 manages device and FPGA clocking
- Option to switch to external direct clocking
When connected to a specified Analog Devices high speed converter evaluation board, the ADS9-V2EBZ works as a data capture/transmit board. Designed to support the highest speed JESD204B/C data converters, the FPGA on the ADS9-V2EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.
Features & Benefits
Xilinx Kintex Ultrascale+ XCKU15P-2FFVE1517E FPGA.
- One (1) FMC+ connector.
- Twenty (20) 28Gbps transceivers supported by one (1) FMC+ connector.
- HMC DRAM
- Simple USB 3.0 port interface.
- Two micro SD cards are included, "TRX" -- for ADRV9026 evaluation boards and "HSX" -- for MxFE™ evaluation boards.
Tools & Simulations
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.