AD9680
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AD9680

14-Bit, 1.25 GSPS/1 GSPS/820 MSPS/500 MSPS JESD204B, Dual Analog-to-Digital Converter

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Info : RECOMMENDED FOR NEW DESIGNS tooltip
Info : RECOMMENDED FOR NEW DESIGNS tooltip
Part Details
Part Models 8
1ku List Price Starting From $349.25
Features
  • JESD204B (Subclass 1) coded serial digital outputs
  • 1.65 W total power per channel at 1 GSPS (default settings)
  • SFDR at 1 GSPS = 85 dBFS at 340 MHz, 80 dBFS at 1 GHz
  • SNR at 1 GSPS = 65.3 dBFS at 340 MHz (AIN = −1.0 dBFS), 60.5 dBFS at 1 GHz (AIN = −1.0 dBFS)
  • ENOB = 10.8 bits at 10 MHz
  • DNL = ±0.5 LSB
  • INL = ±2.5 LSB
  • Flexible input range: 1.46 Vp-p to 1.94 Vp-p
    • AD9680-1250: 1.58 Vp-p nominal
    • AD9680-1000 and AD9680-820: 1.70 V p-p nominal
    • AD9680-500: 1.46 Vp-p to 2.06 Vp-p (2.06 Vp-p nominal)
  • Noise density = −154 dBFS/Hz at 1 GSPS
  • 1.25 V, 2.5 V, and 3.3 V dc supply operation
  • No missing codes
  • Internal ADC voltage reference
  • Programmable termination impedance
    • 400 Ω, 200 Ω, 100 Ω, and 50 Ω differential
  • 2 GHz usable analog input full power bandwidth
  • 95 dB channel isolation/crosstalk
  • Amplitude detect bits for efficient AGC implementation
  • 2 integrated wideband digital processors per channel
    • 12-bit NCO, up to 4 half-band filters
  • Differential clock input
  • Integer clock divide by 1, 2, 4, or 8
  • Flexible JESD204B lane configurations
  • Small signal dither
Additional Details
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The AD9680 is a dual, 14-bit, 1.25 GSPS/1 GSPS/820 MSPS/500 MSPS analog-to-digital converter (ADC). The device has an on-chip buffer and sample-and-hold circuit designed for low power, small size, and ease of use. This device is designed for sampling wide bandwidth analog signals of up to 2 GHz. The AD9680 is optimized for wide input bandwidth, high sampling rate, excellent linearity, and low power in a small package.

The dual ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations.

The analog input and clock signals are differential inputs. Each ADC data output is internally connected to two digital down-converters (DDCs). Each DDC consists of up to five cascaded signal processing stages: a 12-bit frequency translator (NCO), and four half-band decimation filters. The DDCs are bypassed by default.

In addition to the DDC blocks, the AD9680 has several functions that simplify the automatic gain control (AGC) function in the communications receiver. The programmable threshold detector allows monitoring of the incoming signal power using the fast detect output bits of the ADC. If the input signal level exceeds the programmable threshold, the fast detect indicator goes high. Because this threshold indicator has low latency, the user can quickly turn down the system gain to avoid an overrange condition at the ADC input.

Users can configure the Subclass 1 JESD204B-based high speed serialized output in a variety of one-, two-, or four-lane configurations, depending on the DDC configuration and the acceptable lane rate of the receiving logic device. Multiple device synchronization is supported through the SYSREF± and SYNCINB± input pins.

The AD9680 has flexible power-down options that allow significant power savings when desired. All of these features can be programmed using a 1.8 V to 3.3 V capable, 3-wire SPI.

The AD9680 is available in a Pb-free, 64-lead LFCSP and is specified over the −40°C to +85°C industrial temperature range. This product is protected by a U.S. patent.

PRODUCT HIGHLIGHTS

  1. Wide full power bandwidth supports IF sampling of signals up to 2 GHz.
  2. Buffered inputs with programmable input termination eases filter design and implementation.
  3. Four integrated wideband decimation filters and numerically controlled oscillator (NCO) blocks supporting multiband receivers.
  4. Flexible serial port interface (SPI) controls various product features and functions to meet specific system requirements.
  5. Programmable fast overrange detection.
  6. 9 mm × 9 mm, 64-lead LFCSP.

APPLICATIONS

  • Communications
  • Diversity multiband, multimode digital receivers
    • 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE
  • General-purpose software radios
  • Ultrawideband satellite receivers
  • Instrumentation
  • Radars
  • Signals intelligence (SIGINT)
  • DOCSIS 3.0 CMTS upstream receive paths
  • HFC digital reverse path receivers
Part Models 8
1ku List Price Starting From $349.25

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Documentation

Documentation

Video

Part Model Pin/Package Drawing Documentation CAD Symbols, Footprints, and 3D Models
AD9680BCPZ-1000
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AD9680BCPZ-1250
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AD9680BCPZ-500
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AD9680BCPZ-820
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AD9680BCPZRL7-1000
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AD9680BCPZRL7-1250
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AD9680BCPZRL7-500
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AD9680BCPZRL7-820
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Product Lifecycle

PCN

Dec 9, 2016

- 16_0107

AD9680-500/820/1000/1250 Die Revision and Data Sheet Change

AD9680BCPZ-1000

PRODUCTION

AD9680BCPZ-1250

PRODUCTION

AD9680BCPZ-500

PRODUCTION

AD9680BCPZ-820

PRODUCTION

AD9680BCPZRL7-1000

PRODUCTION

AD9680BCPZRL7-1250

PRODUCTION

AD9680BCPZRL7-500

PRODUCTION

AD9680BCPZRL7-820

PRODUCTION

Filter by Model

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PCN

Dec 9, 2016

- 16_0107

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AD9680-500/820/1000/1250 Die Revision and Data Sheet Change

AD9680BCPZ-1000

PRODUCTION

AD9680BCPZ-1250

PRODUCTION

AD9680BCPZ-500

PRODUCTION

AD9680BCPZ-820

PRODUCTION

AD9680BCPZRL7-1000

PRODUCTION

AD9680BCPZRL7-1250

PRODUCTION

AD9680BCPZRL7-500

PRODUCTION

AD9680BCPZRL7-820

PRODUCTION

Software & Part Ecosystem

Software & Part Ecosystem

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Evaluation Kit

Evaluation Kits 5

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ADS7-V2EBZ

FPGA Based Data Capture Kit

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ADS7-V2EBZ

FPGA Based Data Capture Kit

FPGA Based Data Capture Kit

Features and Benefits

  • Based on Virtex-7 FPGA 
  • One (1) FMC-HPC connector 
  • Ten (10) 13.1 Gbps transceivers supported 
  • Two (2) DDR3-1866 DIMMs 
  • Simple USB port interface (2.0)



Product Detail

The ADS7-V2 Evaluation Board was developed to support the evaluation of Analog Devices high speed A/D converters, D/A converters and Transceivers with JESD204B bit rates up to 13.1 Gbps. The Quick Start Wiki site listed below provides a high level overview of the platform. In addition, each use case of the board has its own section (e.g. Using the ADS7-V2 for High Speed A/D Converter Evaluation). The ADS7-V2 is intended to be used only with specified Analog Devices Evaluation Boards. The ADS7-V2 is not intended to be used as a development platform, and no support is available for standalone operation. Please refer to Xilinx and its approved distributors for FPGA Development Kits
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AD-FMCADC4-EBZ

ADA4961 & AD9680 Analog Signal Chain Evaluation and AD9528 Converter Synchronization

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AD-FMCADC4-EBZ

ADA4961 & AD9680 Analog Signal Chain Evaluation and AD9528 Converter Synchronization

ADA4961 & AD9680 Analog Signal Chain Evaluation and AD9528 Converter Synchronization

Features and Benefits

  • Four channels of 1.0 GSPS conversion utilizing JESD204B high speed serial interface
  • Driver amplifier interface with 21dB voltage gain adjustment
  • Optional on-board or external clocking
  • Specific design and I/O added for multi-board synchronization

Product Detail

The AD-FMCADC4-EBZ is a high speed 4-channel data acquisition board featuring two AD9680 dual channel ADC at 1000 MSPS and four ADA4961 low distortion, 3.2 GHz, RF DGA driving each converter. The FMC form factor supports the JESD204B high speed serial interface. All clocking and channel synchronization is support on-board using the AD9528 clock generator. This product is designed for sampling wide bandwidth analog signals up to the second Nyquist zone. The combination of wide input bandwidth, high sampling rate, and excellent linearity of the AD9680 is ideally suited for spectrum analyzers, data acquisition systems, and a wide assortment of military electronics applications, such as radar and jamming/anti-jamming measures.


The board meets most of the FMC specifications in terms of mechanical size, mounting hole locations, and more. Although this board does meet most of the FMC specifications, it’s not meant as a commercial off the shelf (COTS) board. If you want a commercial, ready to integrate product, please refer to one of the many FMC manufacturers and the FMC specification (ANSI/VITA 57.1).

This board is targeted to use the ADI reference designs that work with Xilinx development systems. ADI provides complete source (HDL and software) to re-create those projects (minus the IP provided by the FPGA vendors, which we use), but may not provide enough info to port this to your custom platform.

The design of the board is specifically tailored to synchronizing multiple AD-FMCADC4-EBZ boards together. For more information on synchronization please refer to A Test Method for Synchronizing Multiple GSPS Converters. The reference design includes the device data capture via the JESD204B serial interface and the SPI interface. The samples are written to the external DDR-DRAM. It allows programming the device and monitoring its internal registers via SPI.

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AD-FMCDAQ2-EBZ

AD-FMCDAQ2-EBZ Evaluation Board

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AD-FMCDAQ2-EBZ

AD-FMCDAQ2-EBZ Evaluation Board

AD-FMCDAQ2-EBZ Evaluation Board

Features and Benefits

  • Includes schematics, layout, BOM, Gerber files, HDL, Linux® drivers, IIO Oscilloscope, VisualANALOG
  • FMC-compatible form factor
  • Powered from FMC connector
  • Provides two channels of ADC and two channels of DAC with full synchronization capabilities

Product Detail

The AD-FMCDAQ2-EBZ module is comprised of the AD9680 dual, 14-bit, 1.0 GSPS, JESD204B ADC, the AD9144 quad, 16-bit, 2.8 GSPS, JESD204B DAC, the AD9523-1 14-output, 1GHz clock, and power management components. It is clocked by an internally generated carrier platform via the FMC connector, comprising a completely self-contained data acquisition and signal synthesis prototyping platform. In an FMC footprint (84 mm × 69 mm), the module’s combination of wideband data conversion, clocking, and power closely approximates real-world hardware and software for system prototyping and design, with no compromise in signal chain performance.

Applications

  • Electronic test and measurement equipment
  • General-purpose software radios
  • Radar systems
  • Ultra wideband satellite receivers
  • Point-to-point communication systems
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EVAL-FMCDAQ3-EBZ

High speed data acquisition FMC board

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EVAL-FMCDAQ3-EBZ

High speed data acquisition FMC board

High speed data acquisition FMC board

Features and Benefits

  • Provides two channels of ADC and two channels of DAC with full synchronization capabilities
  • FMC-compatible form factor
  • Powered from single FMC connector

Product Detail

The AD-FMCDAQ3-EBZ module is comprised of the AD9680 dual, 14-bit, 1.25 GSPS, JESD204B ADC, the AD9152 dual, 16-bit, 2.5 GSPS, JESD204B DAC, the AD9528 clock, and power management components. It is clocked by an internally generated carrier platform via the FMC connector, comprising a completely self-contained data acquisition and signal synthesis prototyping platform. In an FMC footprint (84 mm × 69 mm), the module’s combination of wideband data conversion, clocking, and power closely approximates real-world hardware and software for system prototyping and design, with no compromise in signal chain performance.


Applications

  • Electronic test and measurement equipment
  • General-purpose software radios
  • Radar systems
  • Ultra-wideband satellite receivers
  • Signals intelligence (SIGINT)
  • Point to point communication systems
  • DOCSIS 3.0 CMTS and HFC networks
  • Multiple input/multiple output (MIMO) radios
  • Automated test equipment

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EVAL-AD9680

AD9680/AD9234/AD9690 Evaluation Board

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EVAL-AD9680

AD9680/AD9234/AD9690 Evaluation Board

AD9680/AD9234/AD9690 Evaluation Board

Features and Benefits

  • Full featured evaluation board for the AD9680 and AD9234
  • SPI interface for setup and control
  • Wide band Balun driven input
  • No external supply needed. Uses 12V-1A and 3.3V-3A supplies from FMC
  • VisualAnalog® and SPI controller software interfaces

Product Detail

The AD9680-1000EBZ/AD9234-1000EBZ/AD9690-1000EBZ is an evaluation board for the AD9680-1000 14-Bit, 1000MSPS JESD204B, Dual Analog-to-Digital Converter/ AD9234-1000 14-BIT, 1000 MSPS JESD204B, Dual Analog to Digital Converter/ AD9690-1000 14-Bit, 500 MSPS, 1 GSPS JESD204B, Analog-to-Digital Converter. This reference design provides all of the support circuitry required to operate the ADC in its various modes and configurations. It is designed to interface directly with the ADS7-V2EBZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device's hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI Controller software package is also compatible with this hardware, and allows the user to access the SPI programmable features of the AD9680/AD9234/AD9690. The user guide wiki provides documentation and instructions to configure the device for performance evaluation in the lab.

The AD9680/AD9234/AD9690 data sheet provides additional information related to device configuration and performance, and should be consulted when using the evaluation board. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email highspeed.converters@analog.com

EQUIPMENT NEEDED

  • Analog signal source and antialiasing filter
  • Sample Clock Source
  • REFCLOCK source for FPGA receiver
  • PC running Windows 7, XP or Vista
  • USB 2.0 port recommended (USB 1.1 compatible)
  • AD9680-1000EBZ Evaluation Board
  • ADS7-V2EBZ FPGA Based Data Capture Kit
Tools & Simulations

Tools & Simulations 10

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.

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