Features and Benefits

  • Four channels of 1.0 GSPS conversion utilizing JESD204B high speed serial interface
  • Driver amplifier interface with 21dB voltage gain adjustment
  • Optional on-board or external clocking
  • Specific design and I/O added for multi-board synchronization

Product Details

The AD-FMCADC4-EBZ is a high speed 4-channel data acquisition board featuring two AD9680 dual channel ADC at 1000 MSPS and four ADA4961 low distortion, 3.2 GHz, RF DGA driving each converter. The FMC form factor supports the JESD204B high speed serial interface. All clocking and channel synchronization is support on-board using the AD9528 clock generator. This product is designed for sampling wide bandwidth analog signals up to the second Nyquist zone. The combination of wide input bandwidth, high sampling rate, and excellent linearity of the AD9680 is ideally suited for spectrum analyzers, data acquisition systems, and a wide assortment of military electronics applications, such as radar and jamming/anti-jamming measures.

The board meets most of the FMC specifications in terms of mechanical size, mounting hole locations, and more. Although this board does meet most of the FMC specifications, it’s not meant as a commercial off the shelf (COTS) board. If you want a commercial, ready to integrate product, please refer to one of the many FMC manufacturers and the FMC specification (ANSI/VITA 57.1).

This board is targeted to use the ADI reference designs that work with Xilinx development systems. ADI provides complete source (HDL and software) to re-create those projects (minus the IP provided by the FPGA vendors, which we use), but may not provide enough info to port this to your custom platform.

The design of the board is specifically tailored to synchronizing multiple AD-FMCADC4-EBZ boards together. For more information on synchronization please refer to A Test Method for Synchronizing Multiple GSPS Converters. The reference design includes the device data capture via the JESD204B serial interface and the SPI interface. The samples are written to the external DDR-DRAM. It allows programming the device and monitoring its internal registers via SPI.

Getting Started

For all the information needed to get started with this board, please refer to our Wiki Quick Start Guide.

System Requirements

The minimum requirements for evaluating the AD-FMCADC4-EBZ are a PC capable of running Vivado Design Suite from Xilinx and the development kit for your FPGA of choice. Fully supported carriers currently include the ZC706 and VC707 platforms.


Evaluation Software

JESD204 Interface Framework
Integrated JESD204 software framework for rapid system-level development and optimization

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