AD9152

RECOMMENDED FOR NEW DESIGNS

Dual, 16-Bit, 2.25 GSPS, TxDAC+ Digital-to-Analog Converter

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Overview

  • Supports input data rates up to 1.125 GSPS
  • Proprietary low spurious and distortion design
    • Single carrier LTE 20 MHz bandwidth (BW), ACLR = 77 dBc
      at 180 MHz IF
    • SFDR = 72 dBc at 150 MHz IF, −6 dBFS
  • Flexible 4-lane JESD204B interface
  • Multiple chip synchronization
    • Fixed latency
    • Data generator latency compensation
  • Selectable 1×, 2×, 4×, and 8× interpolation filter
    • Low power architecture
  • Input signal power detection
    • Emergency stop for downstream analog circuitry protection
  • Transmit enable function allows extra power saving
  • High performance, low noise, phase-locked loop (PLL) clock multiplier
  • Digital inverse sinc filter and programmable finite impulse response (FIR) filter
  • Low power: 1223 mW at 1.5 GSPS, 1406 mW at 2.0 GSPS, full operating conditions
  • 56-lead LFCSP with exposed pad

The AD9152 is a dual, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a maximum sample rate of 2.25 GSPS, permitting a multicarrier generation up to the Nyquist frequency. The DAC outputs are optimized to interface seamlessly with the ADRF6720 analog quadrature modulator (AQM) from Analog Devices, Inc. An optional 3-wire or 4-wire serial port interface (SPI) provides for programming/readback of many internal parameters. The full-scale output current can be programmed over a range of 4 mA to 20 mA. The AD9152 is available in a 56-lead LFCSP. The AD9152 is a member of the TxDAC+® family.

PRODUCT HIGHLIGHTS

  1. Ultrawide signal bandwidth enables emerging wideband and multiband wireless applications.
  2. Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies.
  3. JESD204B Subclass 1 support simplifies multichip synchronization in software and hardware design.
  4. Fewer pins for data interface width with the serializer/deserializer (SERDES) JESD204B four-lane interface.
  5. Programmable transmit enable function allows easy design balance between power consumption and wake-up time.
  6. Small package size with an 8 mm × 8 mm footprint.

APPLICATIONS

  • Wireless communications
    • Multicarrier LTE and GSM base stations
    • Wideband repeaters
    • Software defined radios
  • Wideband communications
    • Point to point microwave radios
    • LMDS/MMDS
  • Transmit diversity, multiple input/multiple output (MIMO)
  • Instrumentation
  • Automated test equipment

AD9152
Dual, 16-Bit, 2.25 GSPS, TxDAC+ Digital-to-Analog Converter
AD9152 Functional Block Diagram AD9152 Pin Configuration
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Documentation

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Software Resources


Hardware Ecosystem

Parts Product Life Cycle Description
Clock ICs 3
LTC6953 LAST TIME BUY Ultralow Jitter, 4.5GHz Clock Distributor with 11 Outputs and JESD204B/JESD204C Support
LTC6952 LAST TIME BUY Ultralow Jitter, 4.5GHz PLL with 11 Outputs and JESD204B / JESD204C Support
HMC7044 RECOMMENDED FOR NEW DESIGNS High Performance, 3.2 GHz, 14-Output Jitter Attenuator with JESD204B and JESD204C Support
Fanout Buffers & Splitters 2
HMC7043 RECOMMENDED FOR NEW DESIGNS

High Performance, 3.2 GHz, 14-Output Fanout Buffer with JESD204B/JESD204C

HMC6832 LAST TIME BUY Low Noise, 2:8 Differential, Fanout Buffer
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Tools & Simulations

IBIS Model 1

AD9144/AD9152/AD9154/AD9135/AD9136 AMI Model Download

Open Tool

DAC Companion Transport Layer RTL Code Generator

These command line executable tool generates a Verilog module which implements the JESD204 transmitter transport layer. The user specifies in a configuration file one or more modes to be supported by the transport layer module. These modes are defined as a set of JESD204 parameter values: L, M, F, S, N', and CF. The transport layer converts JESD204 lane data output from a JESD204 link layer IP to a data bus with a fixed width, containing interleaved virtual converter samples. Both JESD204B and JESD204C link layers are supported.

Open Tool
LTspice

LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.


Evaluation Kits

eval board
ADS8-V1EBZ

ADS8-V1 Evaluation Board

Features and Benefits

  • Xilinx Kintex Ultrascale XCKU040-3FFVA1156E FPGA.
  • One (1) FMC+ connector.
  • Twenty (20) 16Gbps transceivers supported by one (1) FMC+ connector.
  • DDR4 SDRAM.
  • Simple USB 3.0 port interface.

Product Details

When connected to a specified Analog Devices high speed adc evaluation board, the ADS8-V1 works as a data acquistion board. Designed to support the highest speed JESD204B A/D Converters, the FPGA on the ADS8-V1 acts as the data receiver, while the ADC is the data transmitter.

eval board
EVAL-FMCDAQ3-EBZ

High speed data acquisition FMC board

Features and Benefits

  • Provides two channels of ADC and two channels of DAC with full synchronization capabilities
  • FMC-compatible form factor
  • Powered from single FMC connector

Product Details

The AD-FMCDAQ3-EBZ module is comprised of the AD9680 dual, 14-bit, 1.25 GSPS, JESD204B ADC, the AD9152 dual, 16-bit, 2.5 GSPS, JESD204B DAC, the AD9528 clock, and power management components. It is clocked by an internally generated carrier platform via the FMC connector, comprising a completely self-contained data acquisition and signal synthesis prototyping platform. In an FMC footprint (84 mm × 69 mm), the module’s combination of wideband data conversion, clocking, and power closely approximates real-world hardware and software for system prototyping and design, with no compromise in signal chain performance.


Applications

  • Electronic test and measurement equipment
  • General-purpose software radios
  • Radar systems
  • Ultra-wideband satellite receivers
  • Signals intelligence (SIGINT)
  • Point to point communication systems
  • DOCSIS 3.0 CMTS and HFC networks
  • Multiple input/multiple output (MIMO) radios
  • Automated test equipment

eval board
EVAL-AD9152

AD9152 Evaluation Board

Product Details

AD9152-EBZ (obsolete), AD9152-M6720-EBZ (obsolete) and AD9152-FMC-EBZ support the AD9152, which is a dual, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a maximum sample rate of 2.25 GSPS, permitting a multicarrier generation up to the Nyquist frequency. The DAC outputs are optimized to interface seamlessly with the ADRF6720 analog quadrature modulators (AQMs) from Analog Devices, Inc. An optional 3-wire or 4-wire serial port interface (SPI) provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 4 mA to 20 mA.

eval board
ADS7-V2EBZ

FPGA Based Data Capture Kit

Features and Benefits

  • Based on Virtex-7 FPGA 
  • One (1) FMC-HPC connector 
  • Ten (10) 13.1 Gbps transceivers supported 
  • Two (2) DDR3-1866 DIMMs 
  • Simple USB port interface (2.0)



Product Details

The ADS7-V2 Evaluation Board was developed to support the evaluation of Analog Devices high speed A/D converters, D/A converters and Transceivers with JESD204B bit rates up to 13.1 Gbps. The Quick Start Wiki site listed below provides a high level overview of the platform. In addition, each use case of the board has its own section (e.g. Using the ADS7-V2 for High Speed A/D Converter Evaluation). The ADS7-V2 is intended to be used only with specified Analog Devices Evaluation Boards. The ADS7-V2 is not intended to be used as a development platform, and no support is available for standalone operation. Please refer to Xilinx and its approved distributors for FPGA Development Kits

ADS8-V1EBZ
ADS8-V1 Evaluation Board
ADS8-V1EBZANGLE-web ADS8-V1EBZBOTTOM-web ADS8-V1 Evaluation Board (top)
EVAL-FMCDAQ3-EBZ
High speed data acquisition FMC board
FMCDAQ3 Block Diagram FMCDAQ3 (top)
EVAL-AD9152
AD9152 Evaluation Board
AD9152-FMC-EBZ Evaluation Board - Top View AD9152-FMC-EBZ Evaluation Board - Bottom View AD9152-FMC-EBZ Evaluation Board AD9152-FMC-EBZ and ADS7-V2EBZ - Top View AD9152-FMC-EBZ and ADS7-V2EBZ
ADS7-V2EBZ
FPGA Based Data Capture Kit
ADS7-V2EBZ

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