New Content (1)
Overview
Features and Benefits
- Flexible, reconfigurable radio common platform design
- Transmitter/receiver channel bandwidth up to 1.2 GHz (4T4R)
- RF DAC/RF ADC RF frequency range up to 7.5 GHz
- On-chip PLL with multichip synchronization
- External RF clock input option
- Versatile digital features
- Selectable interpolation and decimation filters
- Configurable DDCs and DUCs
- 8 fine complex DUCs (FDUC) and 4 coarse complex DUCs (CDUC)
- 8 fine complex DDCs (FDDC) and 4 coarse complex DDCs (CDDC)
- FDUCs and FDDCs are fully bypassable
- 2 independent 48-bit NCOs per DUC or DDC
- Programmable 192-tap PFIR filter for receive equalization
- Supports 4 different profile settings loaded via GPIO
- Receive AGC support
- Fast detect with low latency for fast AGC control
- Signal monitor for slow AGC control
- Dedicated AGC support pins
- Transmit DPD support
- Programmable delay and gain per transmit data path
- Coarse DDC delay adjust for DPD observation path
- Supports real or complex digital data (8-, 12-, or 16-bit)
- Auxiliary features
- ADC clock driver with selectable divide ratios
- Power amplifier downstream protection circuitry
- On-chip temperature monitoring unit
- Programmable GPIO pins support toggling between modes
- TDD power savings option and sharing ADCs
- SERDES JESD204B or JESD204C interface, 16 lanes up to 24.75 Gbps
- 8 lanes JESD204B/C transmitter (JTx) and 8 lanes JESD204B/C receiver (JRx)
- Supports Subclass 1
- Supports multidevice synchronization
- 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch
Product Details
The AD9988 is a highly integrated device with four 16-bit, 12 GSPS maximum sample rate, RF digital-to-analog converter (DAC) cores, and four 12-bit, 4 GSPS rate, RF analog-to-digital converter (ADC) cores. The device supports four transmitter channels and four receiver channels with a 4T4R configuration. This product is well suited for four-antenna TDD transmitter applications, where the receiver path can be shared between receiver and observation modes. The GPIO pins can be configured and toggled to support different user modes, while phase coherency is maintained. The maximum radio channel bandwidth supported is 1.2 GHz in a 4T4R configuration and a sample resolution of 16 bits. The AD9988 features a 16-lane 24.75 Gbps JESD204C or 15.5 Gbps JESD204B serial data port that allows up to eight lanes per transmit/receive link, an on-chip clock multiplier, and digital signal processing capability targeted at multiband direct to RF radio applications.
APPLICATIONS
- Wireless communications infrastructure
- W-CDMA, LTE, LTE-A, massive multiple input multiple output (MIMO)
- Point to point microwave, E-band, and 5G mmWave
- Broadband communications systems
- DOCSIS 3.0+ cable modem termination system (CMTS)
- Communication test and measurement systems
Product Categories
Markets and Technologies
Product Lifecycle
Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (2)
Documentation & Resources
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AD9988: 4T4R Direct RF Receiver and Transmitter Data Sheet (Rev. A)2/8/2021PDF4 M
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RF, Microwave, and Millimeter Wave Product Selection Guide7/13/2018PDF9M
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Intel AN-976 (AD9081/AD9082 Tx Path JESD204C Interoperability with Agilex)2/22/2023
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Intel AN-960 (AD9081/AD9082 Rx Path JESD204C Interoperability with Agilex)2/22/2023
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Intel AN-949 (AD9081/AD9082 Tx Path JESD204C Interoperability with Stratix 10)7/27/2021
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Intel AN-927 (AD9081/AD9082 Rx Path JESD204C Interoperability with Stratix 10)10/14/2020
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Intel AN-916 (AD9081/AD9082 JESD204C Interoperability with Stratix 10)6/22/2020
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MxFE Evaluation Platform Demonstration Series8/1/2022SERIES
Software & Systems Requirements
Device Drivers
API Device Drivers
Device Application Programming Interface (API) C code drivers provided as reference code that allows the user to quickly configure the product using high-level function calls. The library acts as an abstraction layer between the application and the hardware. The API is developed in C99 to ensure agnostic processor and operating system integration. Customers can port this application layer code to their embedded systems by integrating their platform-specific code base to the API HAL layer.
To request this software package, go to the Software Request Form signed in with your MyAnalog account and under “Target Hardware” select “High Speed Data Converters” and choose the desired API product package. You will receive an email notification once the software is provided to you.
Tools & Simulations
Software and Simulation
Thermal Models
IBIS Models
S-Parameters
Keysight ADS workbook and s-parameter files for simulating the frequency response of the AD908x DAC, ADC, and CLK interfaces. See Application note AN-2065: Optimizing RF performance of the AD9081 and AD9082” for instructions on how to use the models.
Design Tools
The JESD204B/C Mode Selector Tool is a simple command line-based Windows executable that can be used to narrow down the number of JESD204x modes to only include those modes that support the user’s specific application use case. The tool guides the user through a use case description flow chart and gives the user a small list of applicable transmit and/or receive modes to choose from. This tool is applicable to the AD9081, AD9082, AD9177, AD9207, AD9209, AD9986, and AD9988.
This command line executable tool generates a Verilog module which implements the JESD204 receive transport layer. The user specifies in a configuration file one or more modes to be supported by the transport layer module. These modes are defined as a set of JESD204 parameter values: L, M, F, S, N', and CF. The transport layer converts JESD204 lane data output from a JESD204 link layer IP to a data bus with a fixed width, containing interleaved virtual converter samples. Both JESD204B and JESD204C link layers are supported.
The JESD204x Frame Mapping Table Generator tool consists of two Windows executables that will allow the user to input any valid combination of JESD204x parameters (L, M, F, S, NP) in order to output a .csv file that illustrates the frame mapping of the JESD204x mode in table format. There is an executable that allows the user to input a single JESD204x mode and another, that allows the user to input the parameters for multiple JESD204x modes in a specified .csv format in order to output a .csv file that illustrates the frame mapping of each of the JESD204x modes that were input into separate tables.
ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.
Product Recommendations
AD9988 Companion Parts
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
Part Number | Material Declaration | Reliability Data | Pin/Package Drawing | CAD Symbols, Footprints & 3D Models |
---|---|---|---|---|
AD9988BBPZ-4D4AC | Material Declaration | Reliability Data | 324-Ball BGA_ED (15mm x 15mm x 1.58mm) | |
AD9988BBPZRL-4D4AC | Material Declaration | Reliability Data | 324-Ball BGA_ED (15mm x 15mm x 1.58mm) | |
Wafer Fabrication Data |
PCN-PDN Information
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Support & Discussions
AD9988 Discussions
Sample & Buy
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Evaluation Boards
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.