New Content (1)
Features and Benefits
- Flexible reconfigurable common platform design
- Supports single, dual, and quad band
- Datapaths and DSP blocks are fully bypassable
- ADC sample rate ratios of 1, 2, 3, and 4
- On-chip PLL with multichip synchronization
- External RF clock input option for off-chip PLL
- Maximum ADC sample rate up to 4 GSPS
- Maximum data rate up to 4 GSPS using JESD204C
- Useable analog bandwidth to 8 GHz
- Buffered input with −3 dB bandwidth ≥ 7.5 GHz
- Full-scale of 1.4 V p-p with RIN = 100 Ω
- Overload protection clamp
- Supports dc coupled with common-mode feedback
- ADC ac performance at 4 GSPS
- Noise density: −151.5 dBFS/Hz
- Noise figure: 26.8 dB
- HD2: −67 dBFS at 2.7 GHz
- HD3: −74 dBFS at 2.7 GHz
- Worst other (excluding HD2 and HD3): −82 dBFS at 2.7 GHz
- Auxiliary features
- Fast frequency hopping
- ADC clock driver with selectable divide ratios
- On-chip temperature monitoring unit
- Flexible GPIOx pins
- Versatile digital features
- Selectable decimation filters
- Configurable digital down conversion (DDC)
- 8 fine complex DDCs and 4 coarse complex DDCs
- 48-bit numerically controlled oscillator (NCO) per DDC
- Option to bypass fine and coarse DDC
- Programmable 192 tap programmable filter (PFIR) for receive equalization
- Supports 4 different profile settings loaded via GPIO
- Programable delay per data path
- Receive automatic gain control (AGC) support
- Fast detect with low latency for fast AGC control
- Signal monitor for slow AGC control
- Dedicated AGC support pins
- SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps
- 8 lanes per ADCs
- JESD204B compatible with the maximum 15.5 Gbps lane rate
- JESD204C compatible with the maximum 24.75 Gbps lane rate
- Supports real or complex digital data (8-bit, 12-bit, 16-bit, or 24-bit)
- 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch
The AD9209 is a quad, 12-bit, 4 GSPS analog-to-digital converter (ADC). The ADC input features an on-chip wideband buffer with overload protection. This product is designed to support communications applications capable of direct sampling wideband signals with a range up to 7.5 GHz. An optional low phase noise phase-locked loop (PLL) clock synthesizer is available to generate the ADC sampling clock, simplifying printed circuit board (PCB) distribution of a high frequency clock signal. Alternatively, the CLKIN of the device can be driven directly with the ADC sampling clock (or a higher version up to 12 GHz when the internal clock divider is enabled). An optional CLKOUT buffer is available to transmit the ADC sampling clock to other devices.
- Wireless communications infrastructure
- Microwave point-to-point, E-band, and 5G mm wave Broadband communications systems
- Data over cable service interface specification (DOCSIS) 3.1 and 4.0 cable modem termination system (CMTS)
- Phased array radar and electronic warfare
- Electronic test and measurement systems
Product Lifecycle Pre-Release
This product is new and engineering validation may still be underway. Quantities may be limited and design specifications may change while we ready the product for release to production.
Evaluation Kits (2)
When connected to a specified Analog Devices high speed converter evaluation board, the ADS9-V2EBZ works as a data capture/transmit board. Designed to support the highest speed JESD204B/C data converters, the FPGA on the ADS9-V2EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.
Features & Benefits
Xilinx Kintex Ultrascale+ XCKU15P-2FFVE1517E FPGA.
- One (1) FMC+ connector.
- Twenty (20) 28Gbps transceivers supported by one (1) FMC+ connector.
- HMC DRAM
- Simple USB 3.0 port interface.
- Two micro SD cards are included, "TRX" -- for ADRV9026 evaluation boards and "HSX" -- for MxFE™ evaluation boards.
The AD9081-FMCA-EBZ evaluation board includes all of the support circuitry required to operate the AD9081 in various modes and configurations. The application software used to interface with the device is also described. The AD9081-FMCA-EBZ evaluation board connects to the Analog Devices, Inc., ADS9-V2EBZ for evaluation with the ACE software. The boards can also interface to commercially available field-programmable gate array (FPGA) development boards from Xilinx® or Intel®. Information on how to use these platforms to evaluate the AD9081 or AD9082 is available in the Using the AD-FMC-SDCARD section.
The ACE software allows the user to set up the AD9081 or AD9082 in various modes, and capture analog-to-digital converter (ADC) data for analysis. The DPGDownloaderLite software generates and transmits vectors to the DACs, which can then be sent to a spectrum analyzer for further analysis. For more details, see the AD9081 and AD9082 data sheets, which must be consulted in conjunction with this user guide when using the evaluation boards.
Features & Benefits
- Fully functional evaluation boards for the AD9081
- PC software for control with ACE software
- On-board clocking provided by the HMC7044 manages device and FPGA clocking
- Option to switch to external direct clocking
Tools & Simulations
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.