Features and Benefits

  • 12-bit 2.5 GSPS ADC, no missing codes
  • SFDR = 79 dBc, AIN up to 1 GHz at −1 dBFS, 2.5 GSPS
  • SFDR = 77 dBc, AIN up to 1.8 GHz at −1 dBFS, 2.5 GSPS
  • SNR = 57.6 dBFS, AIN up to 1 GHz at −1 dBFS, 2.5 GSPS
  • SNR = 57 dBFS, AIN up to 1.8 GHz at −1 dBFS, 2.5 GSPS
  • Noise spectral density = −149.5 dBFS/Hz at 2.5 GSPS
  • Differential analog input: 1.2 V P-P
  • Differential clock input
  • 3.2 GHz analog input bandwidth, full power
  • High speed 6- or 8-lane JESD204B serial output Subclass 1: 6.50 Gbps at 2.6 GSPS
  • Two independent decimate by 8 or decimate by 16 filters with 10-bit NCOs
  • Supply voltages: 1.3 V, 2.5 V
    • Flexible digital output modes
    • Built-in selectable digital test patterns
  • Timestamp feature
  • Conversion error rate < 10−15

Product Details

The AD9625 is a 12-bit monolithic sampling analog-to-digital converter (ADC) that operates at conversion rates of up to 2.6 giga samples per second (GSPS). This product is designed for sampling wide bandwidth analog signals up to the second Nyquist zone. The combination of wide input bandwidth, high sampling rate, and excellent linearity of the AD9625 is ideally suited for spectrum analyzers, data acquisition systems, and a wide assortment of military electronics applications, such as radar and jamming/antijamming measures.

The analog input, clock, and SYSREF± signals are differential inputs. The JESD204B-based high speed serialized output is configurable in a variety of one-, two-, four-, six-, or eight-lane configurations. The product is specified over the industrial temperature range of −40°C to +85°C.


  1. High performance: exceptional SFDR in high sample rate applications, direct RF sampling, and on-chip reference.
  2. Flexible digital data output formats based on the JESD204B specification.
  3. Control path SPI interface port that supports various product features and functions, such as data formatting, gain, and offset calibration values.


  • Spectrum analyzers
  • Military communications
  • Radar
  • High performance digital storage oscilloscopes
  • Active jamming/antijamming
  • Electronic surveillance and countermeasures

Product Lifecycle icon-recommended Recommended for New Designs

This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.

Evaluation Kits (6)

Documentation & Resources

  • View All (34)
  • Data Sheets (1)
  • User Guides (1)
  • Informational (1)
  • FPGA Interoperability Reports (2)
  • Videos (6)
  • Press Releases (4)
  • Technical Articles (18)
  • Webcasts (1)
  • Press Releases
    Technical Articles

    Software & Systems Requirements

    Evaluation Software

    JESD204 Interface Framework

    Integrated JESD204 software framework for rapid system-level development and optimization

    Tools & Simulations

    Virtual Eval - BETA

    Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.


    Design Tools

    Companion Transport Layer RTL Code Generator Tool (Rev. 1.0)

    This command line executable tool generates a Verilog module which implements the JESD204 receive transport layer. The user specifies in a configuration file one or more modes to be supported by the transport layer module. These modes are defined as a set of JESD204 parameter values: L, M, F, S, N', and CF. The transport layer converts JESD204 lane data output from a JESD204 link layer IP to a data bus with a fixed width, containing interleaved virtual converter samples. Both JESD204B and JESD204C link layers are supported.

    JESD204x Frame Mapping Table Generator

    The JESD204x Frame Mapping Table Generator tool consists of two Windows executables that will allow the user to input any valid combination of JESD204x parameters (L, M, F, S, NP) in order to output a .csv file that illustrates the frame mapping of the JESD204x mode in table format. There is an executable that allows the user to input a single JESD204x mode and another, that allows the user to input the parameters for multiple JESD204x modes in a specified .csv format in order to output a .csv file that illustrates the frame mapping of each of the JESD204x modes that were input into separate tables.

    Visual Analog

    For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.


    ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.

    Product Recommendations

    AD9625 Companion Parts

    Recommended Amplifiers

    Recommended Clock Distribution Device

    Recommended Clock Generation Device

    Design Resources

    ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

    PCN-PDN Information

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