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Analog DialogueClock Skew in Large Multi-GHz Clock Trees
Features and Benefits
- High instantaneous dynamic range
- Noise spectral density 154 dBFS/Hz
- SFDR 70 dBc (1 GHz, −1 dBFS)
- Low power consumption: 5.1 W at 10 GSPS
- Integrated input buffer (6.5 GHz input bandwidth)
- 1.4 V p-p full-scale input with RIN = 50 Ω
- Overvoltage protection
- 16-lane JESD204B output (up to 16 Gbps line rate)
- Multichip sync capable with 1 sample accuracy
- DDC NCO synchronization included
- Fast overrange detection for efficient AGC
- Integrated DDC
- Selectable decimation factors
- 16-profile settings for fast frequency hopping
- Optional on-chip PLL clock multiplier
- On-chip temperature sensor
- On-chip negative voltage generators
- Low CER <1e−16
- 12 mm × 12 mm BGA
The AD9213 is a single 12-bit, 10.25 GSPS, RF analog-to-digital converter (ADC) with a 6.5 GHz input bandwidth. The AD9213 has been optimized to support high dynamic range frequency and time domain applications requiring wide instantaneous bandwidth and low code error rates (CER). The AD9213 features a 16-lane JESD204B interface to support its maximum bandwidth capability.
The AD9213 achieves industry leading dynamic range and linearity performance while consuming only 5 W. Based on an interleaved pipeline architecture, the AD9213 features a proprietary calibration and randomization technique that suppresses interleaving spurious artifacts into its noise floor. The excellent linearity performance of the AD9213 is preserved by a combination of on-chip dithering and calibration resulting in excellent spurious free performance over a wide range of input signal conditions.
Applications requiring less instantaneous bandwidth can benefit from the on-chip digital signal processing (DSP) capability of the AD9213 that reduces the output data rate along with the number of JESD204b lanes required to support it. The DSP path includes a digital downconverter (DDC) with a 48-bit, numerically controlled oscillator (NCO) followed by an I and Q digital decimator stage allowing for selectable decimation rates that are factors of two or three. For fast frequency hopping applications, the AD9213 NCO supports up to 16-profile settings with separate trigger input allowing for wide surveillance frequency coverage but at a reduced JESD204B lane count.
The AD9213 also supports sample accurate multichip synchronization that also includes synchronization of the NCOs. The AD9213 will be offered in a 192 flip-chip ball grid array (FcBGA) package. The AD9213 is specified over a junction temperature range of −10°C to +115°C.
Markets & Technology
- Aerospace and Defense
- Instrumentation & Measurement
Product Lifecycle Pre-Release
This product is new and engineering validation may still be underway. Quantities may be limited and design specifications may change while we ready the product for release to production.
Evaluation Kits (2)
The AD9213-10GEBZ and AD9213-6GEBZ supports the 10Gsps and 6Gsps models of the AD9213. The AD9213 is a single 12-bit, 10.25 GSPS RF analog-to-digital converter (ADC) with a 6.5 GHz input bandwidth. It has been optimized to support high dynamic range frequency and time domain applications requiring wide instantaneous bandwidth and low code error rates (CER). The AD9213 features a 16-lane JESD204B interface to support its maximum bandwidth capability.
This Preliminary Evaluation design provides all of the support circuitry required to operate the ADC in its various modes and configurations. It is designed to interface directly with the ADS8-V1EBZ FPGA-based data capture card, allowing users to download captured data for analysis. The device control and subsequent data analysis can be performed using the ACE software package.
Features & Benefits
- Full featured evaluation board for the AD9213 device family.
- Wide band Balun driven input.
- No external supply needed. Uses 12V-1A and 3.3V-3A supplies from FMC+ connector on ADS8-V1EBZ FPGA data capture card.
- Single software interface for device control and analysis through ACE.
When connected to a specified Analog Devices high speed adc evaluation board, the ADS8-V1 works as a data acquistion board. Designed to support the highest speed JESD204B A/D Converters, the FPGA on the ADS8-V1 acts as the data receiver, while the ADC is the data transmitter.
Features & Benefits
- Xilinx Kintex Ultrascale XCKU040-3FFVA1156E FPGA.
- One (1) FMC+ connector.
- Twenty (20) 16Gbps transceivers supported by one (1) FMC+ connector.
- DDR4 SDRAM.
- Simple USB 3.0 port interface.
Tools & Simulations
This tool gives users access to a live AD9213 evaluation board in an Analog Devices lab, connected to signal and clock generators, and an ADS8-V1EBZ FPGA board for data capture. The user is able to run tests on this remote lab bench to evaluate the AD9213 performance at any time, day or night. It is a great way to check performance of the product before, or in lieu of, purchase of an evaluation board. This tool can also be used to compare performance to a user-designed board.
Analog Dialogue (1)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.