Features and Benefits
- High instantaneous dynamic range
- −155 dBFS/Hz at 10 GSPS with −9 dBFS, 170 MHz input
- −153 dBFS/Hz at 10 GSPS with −1 dBFS, 170 MHz input
- SFDR: 70 dBFS at 10 GSPS with −1 dBFS, 1000 MHz input
- SFDR excluding H2 and H3 (worst other spur): 89 dBFS at 10 GSPS with −1 dBFS, 1000 MHz input
- Low power dissipation: <4.6 W typical at 10 GSPS
- Integrated input buffer (6.5 GHz input bandwidth)
- 1.4 V p-p full-scale analog input with RIN = 50 Ω
- Overvoltage protection
- 16-lane JESD204B output (up to 16 Gbps line rate)
- Multichip synchronization capable with 1 sample accuracy
- DDC NCO synchronization included
- Integrated DDC
- Selectable decimation factors
- 16 profile settings for fast frequency hopping
- Fast overrange detection for efficient AGC
- On-chip temperature sensor
- On-chip negative voltage generators
- Low CER: <1 × 10−16
- 12 mm × 12 mm, 192-ball BGA-ED package
The AD9213 is a single, 12-bit, 6 GSPS/10.25 GSPS, radio frequency (RF) analog-to-digital converter (ADC) with a 6.5 GHz input bandwidth. The AD9213 supports high dynamic range frequency and time domain applications requiring wide instantaneous bandwidth and low conversion error rates (CER). The AD9213 features a 16-lane JESD204B interface to support maximum bandwidth capability.
The AD9213 achieves dynamic range and linearity performance while consuming <4.6 W typical. The device is based on an interleaved pipeline architecture and features a proprietary calibration and randomization technique that suppresses interleaving spurious artifacts into its noise floor. The linearity performance of the AD9213 is preserved by a combination of on-chip dithering and calibration, which results in excellent spurious-free performance over a wide range of input signal conditions.
Applications that require less instantaneous bandwidth can benefit from the on-chip, digital signal processing (DSP) capability of the AD9213 that reduces the output data rate along with the number of JESD204B lanes required to support the device. The DSP path includes a digital downconverter (DDC) with a 48-bit, numerically controlled oscillator (NCO), followed by an I/Q digital decimator stage that allows selectable decimation rates that are factors of two or three. For fast frequency hopping applications, the AD9213 NCO supports up to 16 profile settings with a separate trigger input, allowing wide surveillance frequency coverage at a reduced JESD204B lane count.
The AD9213 supports sample accurate multichip synchronization that includes synchronization of the NCOs. The AD9213 is offered in a 192-ball ball grid array (BGA) package and is specified over a junction temperature range of −20°C to +115°C.
Markets & Technology
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (2)
The AD9213-10GEBZ and AD9213-6GEBZ supports the 10Gsps and 6Gsps models of the AD9213. The AD9213 is a single 12-bit, 10.25 GSPS RF analog-to-digital converter (ADC) with a 6.5 GHz input bandwidth. It has been optimized to support high dynamic range frequency and time domain applications requiring wide instantaneous bandwidth and low code error rates (CER). The AD9213 features a 16-lane JESD204B interface to support its maximum bandwidth capability.
This Preliminary Evaluation design provides all of the support circuitry required to operate the ADC in its various modes and configurations. It is designed to interface directly with the ADS8-V1EBZ FPGA-based data capture card, allowing users to download captured data for analysis. The device control and subsequent data analysis can be performed using the ACE software package.
Features & Benefits
- Full featured evaluation board for the AD9213 device family.
- Wide band Balun driven input.
- No external supply needed. Uses 12V-1A and 3.3V-3A supplies from FMC+ connector on ADS8-V1EBZ FPGA data capture card.
- Single software interface for device control and analysis through ACE.
When connected to a specified Analog Devices high speed adc evaluation board, the ADS8-V1 works as a data acquistion board. Designed to support the highest speed JESD204B A/D Converters, the FPGA on the ADS8-V1 acts as the data receiver, while the ADC is the data transmitter.
Features & Benefits
- Xilinx Kintex Ultrascale XCKU040-3FFVA1156E FPGA.
- One (1) FMC+ connector.
- Twenty (20) 16Gbps transceivers supported by one (1) FMC+ connector.
- DDR4 SDRAM.
- Simple USB 3.0 port interface.
Tools & Simulations
Software and Simulation
This tool gives users access to a live AD9213 evaluation board in an Analog Devices lab, connected to signal and clock generators, and an ADS8-V1EBZ FPGA board for data capture. The user is able to run tests on this remote lab bench to evaluate the AD9213 performance at any time, day or night. It is a great way to check performance of the product before, or in lieu of, purchase of an evaluation board. This tool can also be used to compare performance to a user-designed board.
AD9213 Companion Parts
Recommended LDO Linear Regulator
Recommended Multiple Output Bucks
3rd Party Solutions (1)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.