Overview

Features and Benefits

  • DAC update rate up to 12 GSPS (minimum)
  • Direct RF synthesis at 6 GSPS (minimum)
    • DC to 2.5 GHz in baseband mode
    • DC to 6 GHz in 2× nonreturn-to-zero (NRZ) mode
    • 1.5 GHz to 7.5 GHz in Mix-Mode
  • Bypassable interpolation
    • 2×, 3×, 4×, 6×, 8×, 12×, 16×, 24×
  • Excellent dynamic performance
  • Fast frequency hopping

Product Details

The AD91641 is a high performance, 16-bit digital-to-analog converter (DAC) and direct digital synthesizer (DDS) that supports update rates to 6 GSPS. The DAC core is based on a quad-switch architecture coupled with a 2× interpolator filter that enables an effective DAC update rate of up to 12 GSPS in some modes. The high dynamic range and bandwidth makes these DACs ideally suited for the most demanding high speed radio frequency (RF) DAC applications.

The DDS consists of a bank of 32, 32-bit numerically controlled oscillators (NCOs), each with its own phase accumulator.

When combined with a 100 MHz serial peripheral interface (SPI) and fast hop modes, phase coherent fast frequency hopping (FFH) is enabled, with several modes to support multiple applications.

In baseband mode, wide analog bandwidth capability combines with high dynamic range to support DOCSIS 3.1 cable infrastructure compliance from the minimum of one carrier up to the full maximum spectrum of 1.791 GHz of signal bandwidth. A 2× interpolator filter (FIR85) enables the AD9164 to be configured for lower data rates and converter clocking to reduce the overall system power and ease the filtering requirements. In Mix-Mode operation, the AD9164 can reconstruct RF carriers in the second and third Nyquist zones up to 7.5 GHz while still maintaining exceptional dynamic range. The output current can be programmed from 8 mA to 38.76 mA. The AD9164 data interface consists of up to eight JESD204B serializer/deserializer (SERDES) lanes that are programmable in terms of lane speed and number of lanes to enable application flexibility.

An SPI interface configures the AD9164 and monitors the status of all registers. The AD9164 is offered in a 165-ball, 8 mm × 8 mm, 0.5 mm pitch CSP_BGA package, and a 169-ball, 11 mm × 11 mm, 0.8 mm pitch, CSP_BGA package, including a leaded ball option.

Product Highlights

  1. High dynamic range and signal reconstruction bandwidth supports RF signal synthesis of up to 7.5 GHz.
  2. Up to eight lanes JESD204B SERDES interface flexible in terms of number of lanes and lane speed.
  3. Bandwidth and dynamic range to meet DOCSIS 3.1 compliance and multiband wireless communications standards with margin. 

Applications

  • Broadband communications systems
    • DOCSIS 3.1 CMTS/ video on demand (VOD)/edge quadrature amplitude modulation (EQAM)
  • Wireless communications infrastructure
    • W-CDMA, LTE, LTE-A, point to point

Product Lifecycle icon-recommended Recommended for New Designs

This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.

Evaluation Kits (3)

Documentation & Resources

  • View All (16)
  • 3rd Party Solutions (3)
  • Data Sheets (1)
  • User Guides (1)
  • FPGA Interoperability Reports (1)
  • Videos (3)
  • Press Releases (1)
  • Technical Articles (5)
  • Webcasts (1)
  • Technical Articles

    Software & Systems Requirements

    Code Examples

    Tools & Simulations

    IBIS Models

    Design Tools

    Virtual Eval - BETA

    Simulate performance of ADCs and DACs under your operating conditions.

    JESD204x Frame Mapping Table Generator

    The JESD204x Frame Mapping Table Generator tool consists of two Windows executables that will allow the user to input any valid combination of JESD204x parameters (L, M, F, S, NP) in order to output a .csv file that illustrates the frame mapping of the JESD204x mode in table format. There is an executable that allows the user to input a single JESD204x mode and another, that allows the user to input the parameters for multiple JESD204x modes in a specified .csv format in order to output a .csv file that illustrates the frame mapping of each of the JESD204x modes that were input into separate tables.

    Using MATLAB with ADS7 and AD916x Eval Boards

    The AD916x evaluation boards can be used and controlled by a MATLAB simulation. This enables users to verify simulation results by running on actual hardware.

    AD916X Remote Evaluation Tool

    This tool gives users access to a live evaluation board in an Analog Devices lab, connected to a Keysight PXA spectrum analyzer and an ADS7-V2EBZ. The user is able to run tests on this remote lab bench to evaluate the AD9161/2/3/4 performance at any time, day or night. It is a great way to check performance of the product before and after purchase of an evaluation board, as well as to compare performance to a user-designed board.

    ADIsimRF

    ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.

    Product Recommendations

    AD9164 Companion Parts

    Recommended Clock Distribution Device

    Recommended Clock Generation Device

    Recommended PLL with Integrated VCO

    Design Resources

    ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

    PCN-PDN Information

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    Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.