Features and Benefits
- Supports input data rate >1 GSPS
- Proprietary low spurious and distortion design
- 6-carrier GSM IMD = 77 dBc at 75 MHz IF
- SFDR = 82 dBc at dc IF, −9 dBFS
- Flexible 8-lane JESD204B interface
- Support quad or dual DAC mode at 2.8 GSPS
- Multiple chip synchronization
- Fixed latency
- Data generator latency compensation
- Selectable 1×, 2×, 4×, 8× interpolation filter
- Low power architecture
- Input signal power detection
- Emergency stop for downstream analog circuitry protection
- Transmit enable function allows extra power saving
- High performance, low noise phase-locked loop (PLL) clock multiplier
- Digital inverse sinc filter
- Low power: 1.6 W at 1.6 GSPS, 1.7 W at 2.0 GSPS, full operating conditions
- 88-lead LFCSP with exposed pad
The AD9144 is a quad, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a maximum sample rate of 2.8 GSPS, permitting a multicarrier generation up to the Nyquist frequency. The DAC outputs are optimized to interface seamlessly with the ADRF6720 analog quadrature modulator (AQM) from Analog Devices, Inc. An optional 3-wire or 4-wire serial port interface (SPI) provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a typical range of 13.9 mA to 27.0 mA. The AD9144 is available in an 88-lead LFCSP.
- Greater than 1 GHz, ultrawide complex signal bandwidth enables emerging wideband and multiband wireless applications.
- Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies.
- JESD204B Subclass 1 support simplifies multichip synchronization in software and hardware design.
- Fewer pins for data interface width with a serializer/deserializer (SERDES) JESD204B eight-lane interface.
- Programmable transmit enable function allows easy design balance between power consumption and wake-up time.
- Small package size with 12 mm × 12 mm footprint.
- Wireless communications
- 3G/4G W-CDMA base stations
- Wideband repeaters
- Software defined radios
- Wideband communications
- Local multipoint distribution service (LMDS) and multichannel multipoint distribution service (MMDS)
- Transmit diversity, multiple input/multiple output (MIMO)
- Automated test equipment
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (4)
Evaluation board for the AD9144 Quad, 16-Bit, 2.8 GSPS, TxDAC+ Digital-To-Analog Converter that provides a maximum sample rate of 2.8 GSPS, permitting a multicarrier generation up to the Nyquist frequency. The DAC outputs are optimized to interface seamlessly with the ADRF672x analog quadrature modulators (AQMs) from Analog Devices, Inc. A 4-wire serial port interface provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a range of 14 mA to 26 mA.
The ADS7-V2 Evaluation Board was developed to support the evaluation of Analog Devices high speed A/D converters, D/A converters and Transceivers with JESD204B bit rates up to 13.1 Gbps. The Quick Start Wiki site listed below provides a high level overview of the platform. In addition, each use case of the board has its own section (e.g. Using the ADS7-V2 for High Speed A/D Converter Evaluation). The ADS7-V2 is intended to be used only with specified Analog Devices Evaluation Boards. The ADS7-V2 is not intended to be used as a development platform, and no support is available for standalone operation. Please refer to Xilinx and its approved distributors for FPGA Development Kits
Features & Benefits
- Based on Virtex-7 FPGA
- One (1) FMC-HPC connector
- Ten (10) 13.1 Gbps transceivers supported
- Two (2) DDR3-1866 DIMMs
- Simple USB port interface (2.0)
When connected to a specified Analog Devices high speed adc evaluation board, the ADS8-V1 works as a data acquistion board. Designed to support the highest speed JESD204B A/D Converters, the FPGA on the ADS8-V1 acts as the data receiver, while the ADC is the data transmitter.
Features & Benefits
- Xilinx Kintex Ultrascale XCKU040-3FFVA1156E FPGA.
- One (1) FMC+ connector.
- Twenty (20) 16Gbps transceivers supported by one (1) FMC+ connector.
- DDR4 SDRAM.
- Simple USB 3.0 port interface.
The AD-FMCDAQ2-EBZ module is comprised of the AD9680 dual, 14-bit, 1.0 GSPS, JESD204B ADC, the AD9144 quad, 16-bit, 2.8 GSPS, JESD204B DAC, the AD9523-1 14-output, 1GHz clock, and power management components. It is clocked by an internally generated carrier platform via the FMC connector, comprising a completely self-contained data acquisition and signal synthesis prototyping platform. In an FMC footprint (84 mm × 69 mm), the module’s combination of wideband data conversion, clocking, and power closely approximates real-world hardware and software for system prototyping and design, with no compromise in signal chain performance.
- Electronic test and measurement equipment
- General-purpose software radios
- Radar systems
- Ultra wideband satellite receivers
- Point-to-point communication systems
Features & Benefits
- Includes schematics, layout, BOM, Gerber files, HDL, Linux® drivers, IIO Oscilloscope, VisualANALOG
- FMC-compatible form factor
- Powered from FMC connector
- Provides two channels of ADC and two channels of DAC with full synchronization capabilities
Software & Systems Requirements
JESD204 Interface Framework
Tools & Simulations
Virtual Eval - BETA
Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.
The JESD204x Frame Mapping Table Generator tool consists of two Windows executables that will allow the user to input any valid combination of JESD204x parameters (L, M, F, S, NP) in order to output a .csv file that illustrates the frame mapping of the JESD204x mode in table format. There is an executable that allows the user to input a single JESD204x mode and another, that allows the user to input the parameters for multiple JESD204x modes in a specified .csv format in order to output a .csv file that illustrates the frame mapping of each of the JESD204x modes that were input into separate tables.
FPGA Interoperability Reports (2)
Technical Articles (1)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Support & Discussions
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.