# AN-912: Driving a Center-Tapped Transformer with a Balanced Current-Output DAC

The use of a center-tapped transformer as the output interface for a balanced current-output DAC offers several benefits. First, transformer coupling offers dc isolation between the DAC output and the final load. It can also aid in the rejection of common-mode signals present at the DAC output. Furthermore, transformer coupling can mitigate the even harmonics that result from an imbalance between the DAC outputs. Finally, all transformers have a limited bandwidth, which can be used to advantage for suppressing the Nyquist images that typically appear in a DAC output spectrum.

The goal of this application note is two-fold. The first goal is to
provide an explanation of the functionality of a balanced output
in the context of a current-output DAC. The second goal is to
provide formulas that relate the transformer turns ratio (N), the
transformer load (R_{L}), the DAC load resistors (R_{O}), and the maximum DAC output current (I_{MAX}).

### Balanced Current-Output DAC

Balanced current-output DACs come in two varieties: those with current source outputs and those with current sink outputs. DACs with current source outputs always inject current into the external load, while DACs with current sink outputs always draw current from the external load. In both cases, the DAC output consists of two pins: a normal pin and a complementary pin. The arrows that indicate direction of current flow in the diagrams that follow assume conventional current flow (that is, current flows from a positive potential toward a negative potential).

Note that Figure 1 assumes that the DAC is of the current
sourcing variety. In the case of a current sinking DAC, the
direction of I_{A} and I_{B} is reversed. Also, a connection to V_{SUPPLY}
should replace the ground connections at the transformer
center tap and the R_{O} resistors.

In this application note, the current flowing through the normal
and complementary pins is referred to as I_{A} and I_{B}, respectively.
I_{MAX} and represents the upper limit for both I_{A} and I_{B}. The exact value of I_{A} (or I_{B}) depends on the digital code present at the DAC input. The behavior of I_{A} and I_{B} is such that when the digital code is zero, then I_{A} = 0 and I_{B} = I_{MAX}. Conversely, when the digital code is full scale, then I_{A} = I_{MAX} and I_{B} = 0. For intermediate digital codes, the two output currents are between zero and I_{MAX}, but are balanced such that I_{A} + I_{B} = I_{MAX} at all times. Thus, I_{A} and I_{B} can be expressed as

where α is the fractional digital code value, that is, the input digital code value to the DAC divided by the full-scale code value.

For example, given a 10-bit DAC with an input code of 200 and
an I_{MAX} value of 10 mA, then α = 200/1023 (where 1023 is the
full-scale code value given by 2^{10} − 1). This yields I_{A} ≈ 1.955 mA
and I_{B} ≈ 8.045 mA. Also, notice that I_{B} can be expressed in
terms of I_{A} as I_{B} = I_{MAX} − I_{A}.

### DC Analysis

With an understanding of the operation of a balanced currentoutput DAC, a dc analysis of a center-tapped transformer coupled to the DAC output can now be examined. Figure 1 simplifies to the dc equivalent circuit shown in Figure 2, by replacing the DAC with two current sources (one for the normal output and the other for the complementary output). The magnitude of the current delivered by each source is code dependent, as indicated by Equation 1. The current sources have arrows that indicate the direction of current flow. It is assumed that the DAC outputs are of the current source variety. The arrows would be reversed for the current sink variety. In Figure 2, the center-tap connection is redrawn to clearly show that the DAC output circuits are independent current loops (note that the transformer polarity dots have been reoriented to maintain functional equality with Figure 1).

Typically, the resistance of the transformer windings is much
less than the resistance of the DAC termination resistors (R_{O}).
In most applications, this low winding resistance implies that
the vast majority of the dc current associated with I_{A} (or I_{B})
flows through the transformer windings instead of through the
termination resistors. Thus, the dc power rating for the DAC
termination resistors is practically nil.

In general, consider a simple magnetic circuit consisting of a
single winding with an arbitrary number of turns of wire (N)
wrapped on the winding and a static current (I) flowing
through the wire. The current flowing in the wire creates a
magnetic flux (Φ) concentrated within the winding core that is
proportional to the product of the number of wire turns and the
current flowing through the wire (that is, Φ = kNI, where k is
the constant of proportionality). In the case of the tapped
transformer, which has two primary windings, the magnetic
flux in the core is the sum of the contributions of each winding
(that is, Φ = k(N_{A}I_{A} + N_{B}I_{B}). Given that this analysis is based on a center-tapped transformer, the number of turns in each primary winding is the same (that is, N_{A} = N_{B}), which means that the magnetic flux can be expressed as Φ = kN(I_{A} + I_{B}). Thus, the total magnetic flux in the transformer core is proportional to the sum of the primary currents.

It is important to note in Figure 2 that I_{A} flows into the primary winding that is marked with a dot, while I_{B} flows into the primary winding that is opposite the dot. The placement of the
dots indicates that the magnetic flux produced by I_{A} is opposed
to the magnetic flux produced by I_{B}. The orientation of the dots
implies that Φ = kN(I_{A} − I_{B}), instead of kN(I_{A} + I_{B}) as previously stated, for the configuration shown in Figure 1 and Figure 2. Therefore, for the particular center-tapped configuration shown in Figure 1 and Figure 2, the net magnetic flux is proportional to the difference between I_{A} and I_{B} rather than the sum. This is a consequence of the physical connection between the complementary current source and the lower primary winding.

Combining this result with Equation 1, the magnetic flux in the
transformer core can be expressed as Φ = kNI_{MAX}(2α − 1). The
importance of this result is that for the special case of α = ½
(that is, the middle DAC code), the magnetic flux in the core is
0, whereas any other DAC code results in a build-up of static
magnetic flux in the core. The significance of this fact is made
apparent in the AC Analysis section that follows.

### AC Analysis

For ac analysis, consider the specific case in which a DAC generates a sinusoidal output signal. In such a case, a time series of digital codes drives the DAC and produces an output current that varies in sinusoidal fashion. The range of the digital input codes is split such that the lower half of the codes (0 to ½ full scale) generates the lower half of the sinusoid and the upper half of the codes (½ full scale to full scale) generates the upper half of the sinusoid. The average value of the DAC-generated sinusoid, therefore, is ½ full scale. The peak amplitude of the sinusoid is also ½ full scale, since this is the amount by which the signal can swing from the midpoint to either zero or full scale. The sinusoidal current waveform at the normal output of the DAC can be expressed as

where θ represents the instantaneous phase of the sinusoid.

Similarly, because of the relationship between I_{A} and I_{B}, the current waveform at the complementary output of the DAC can
be expressed as

Inspection of Equation 2 and Equation 3 indicates that I_{A} and
I_{B} are both centered at ½I_{MAX}. That is, ½I_{MAX} is the dc term of the sinusoidal waveform. Furthermore, when the magnitude of
sine function increases, then I_{A} increases, whereas I_{B} decreases equally. Notice, too, that the sum of the normal and complementary output currents is always I_{MAX} (that is, I_{A} + I_{B} = I_{MAX}, as mentioned previously in the Balanced Current-Output DAC section). Such is the nature of a balanced output signal.

Note that Equation 2 and Equation 3 ignore the quantized nature of the sinusoidal DAC output current.

This result has interesting consequences when the DAC is driven by a digital sinusoidal generator like a direct digital synthesizer (DDS), for instance, that can be programmed to deliver either a sine signal or a cosine signal. When a sine signal is generated, Equation 2 and Equation 3 apply directly. When a cosine signal is generated, Equation 2 and Equation 3 become, respectively

and

Given the special case of θ = 0, the sine case yields I_{A} = ½I_{MAX} and I_{B} = ½I_{MAX}, whereas the cosine case yields I_{A} = I_{MAX} and I_{B} = 0.
In the DC Analysis section, it was shown that Φ = kN(I_{A} − I_{B}).
Thus, if the digital generator stalls at θ = 0, the transformer core
carries no magnetic flux for the sine case and kNI_{MAX} for the
cosine case. The implication is that if the digital generator is
stalled at θ = 0, and is then switched from sine to cosine (or vice
versa), the magnetic flux in the core jumps from 0 to kNI_{MAX} (or
vice versa). This results in a voltage spike across all of the transformer windings due to the nearly infinite rate of change of flux
in the transformer core.

The previous paragraphs explore the transient behavior of the transformer when switching between sine and cosine waveforms. To explore the steady state behavior of the transformer in the context of ac analysis, it is necessary to understand how a transformer behaves under the stimulus of a sinusoidal signal. This is covered in the appendices. Appendix A describes the basic ac behavior of an ideal transformer, while Appendix B builds on Appendix A to show the ac operation of a tapped transformer.

Figure 3 is the ac equivalent model assuming an ideal, centertapped transformer. Also given in Equation 4 to Equation 7 is a list of the pertinent equations that relate the various circuit parameters. Both the diagram and the equations are a result of the concepts described in Appendix B.

Equation 4 through Equation 7 can be used to predict the
impedance seen by each DAC output (Z_{NORM} and Z_{COMP}), the voltage generated by each of the DAC current sources (v_{NORM}
and v_{COMP}), the impedance presented at the transformer
secondary (Z_{S}), and the voltage across the secondary (v_{S}). It is important for the reader to understand that v_{NORM} and v_{COMP} do not represent the voltage that appears across each primary
winding, but rather the voltage produced by each current source
(I_{A} or I_{B}) as it flows through the reflected impedance of the associated primary winding (Z_{NORM} or Z_{COMP}).

The actual voltage that appears across each primary winding is
referred to as v_{A} for the upper primary winding and v_{B} for the lower. The value of v_{A} and v_{B} can be derived from v_{S} and the
associated turns ratio between the secondary and each primary
winding. Thus, v_{A} and v_{B} can be expressed as

Note that v_{A} and v_{B} are twice as large as v_{NORM} and v_{COMP}. What
is the reason for the discrepancy? The answer lies in the fact
that the two primary windings interact with each other.
Consider Figure 4 where a switch has been added to provide a
means to disconnect the normal DAC output pin from the
circuit.

If the switch is open (see Figure 5), there is effectively no change
from an impedance point of view, because the current source
internal to the DAC exhibits a very high impedance (ideally
infinite). Thus, the complementary output drives the same load
regardless of the state of the switch. The voltage at the complementary output (v_{COMP}) is that given by Equation 6. However, the
upper and lower primary windings are mutually coupled with a
turns ratio of 1:1. This causes a voltage of the same magnitude
to also appear at the upper primary winding (as shown in
Figure 5).

The importance of this fact cannot be overstressed. With the
normal output of the DAC completely disconnected, there is
still a voltage present (v_{COMP}) across the upper DAC termination
resistor (R_{O}). Its presence is due to the mutual coupling of the
AN-912 two primary windings and the voltage produced by the
complementary DAC output driving its associated load
(Z_{COMP}).

With the switch closed as in Figure 4, the current generated by
the normal DAC output produces a voltage across its equivalent
load (Z_{NORM}). The magnitude of this voltage is v_{NORM} and is the same as v_{COMP}. By superposition, this signal sums with the signal produced by the complementary output, that is v_{A} = v_{NORM} + v_{COMP}. But v_{NORM} = v_{COMP}, so v_{A} = 2v_{NORM}, which is why v_{A} is twice as
large as v_{NORM}. Likewise, v_{B} is twice as large as v_{COMP}.

This yields another pair of equations useful for analyzing the center-tapped circuit:

### Impedance Matching

In many applications, it is desirable that Z_{S} be equal to R_{L}. This is especially true when a reconstruction filter is inserted between the secondary and the load, as shown in Figure 6.

Generally, the filter is designed to accommodate equal source
and load impedances, which implies that Z_{S} = R_{L}. Equation 32
in Appendix B shows that Z_{S} = 2N^{2} R_{O}. If it is desired that Z_{S} = R_{L}, then R_{L} can be substituted for Z_{S}. Solving for R_{O} yields

With this choice of R_{O}, Equation 4 through Equation 7 can be
simplified as follows:

Also, Equation 8 can be rewritten for the special case of Z_{S} = R_{L} as

Furthermore, the power delivered to the load is a function of
v_{S}, so Equation 7 can be used to express the power delivered to
the load as

In the case of impedance matching (that is, Z_{S} = R_{L}, which
implies R_{O}, as given in Equation 9), the P_{L} equation reduces to

Equation 16 defines the power delivered to the load for the
impedance matched case and Equation 15 for the general case.
It is interesting to compare Equation 15 and Equation 16 and
to consider the effect on P_{L} in Equation 15 when R_{O} is varied.
Recall that there is only one particular value of R_{O} that provides
impedance matching; namely, R_{O} = R_{L}/(2N^{2}
). If, however,
impedance matching is not a requirement, then there is the
freedom to choose any arbitrary value for R_{O}. By rewriting
Equation 15 in a slightly different form (as shown in Equation 17),
the effect on P_{L} due to varying R_{O} becomes apparent. In this
form, it is evident that a decrease in R_{O} results in a decrease in
the squared term, and vice versa.

In fact, P_{L} is at a minimum when R_{O} = 0 (that is, P_{L} = 0, as
expected) and at a maximum when R_{O} = ∞. For the latter,

Comparison of Equation 16 and Equation 18 indicates that four
times more power (+6 dB) is delivered to the load when R_{O} = ∞
as compared to the impedance matched case.

### Example Calculations

Here, the previous formulas are used to determine the
component values for two different transformer applications.
In Example 1, a transformer with a 1:1 turns ratio (N = 1) is
employed, while in Example 2, a transformer with a 1:2
turns ratio (N = 2) is employed. Both examples use I_{MAX} = 20 mA,
R_{L} = 50 Ω, and assume that impedance matching is employed
(that is, Z_{S} = R_{L}).

#### Example 1: I_{MAX} = 20 mA, R_{L} = 50 Ω, and N = 1

From Equation 9,

R_{O} = 25 Ω (the value of the two DAC termination
resistors)

From Equation 10,

Z_{NORM} = Z_{COMP} = 6.25 Ω (the load driven by each DAC
output pin)

From Equation 14,

v_{A} = v_{B} = 88.39 mV rms (the voltage across each primary)

From Equation 13,

v_{S} = 176.8 mV rms (the voltage across the secondary)

From Equation 16,

P_{L} = 0.625 mW (the power in the load)

#### Example 2: I_{MAX} = 20 mA, RL = 50 Ω, and N = 2

From Equation 9,

R_{O} = 6.25 Ω (the value of the two DAC termination
resistors)

From Equation 10,

Z_{NORM} = Z_{COMP} = 1.5625 Ω (the load driven by each DAC
output pin)

From Equation 14,

v_{A} = v_{B} = 22.10 mV rms (the voltage across each primary)

From Equation 13,

v_{S} = 88.39 mV rms (the voltage across the secondary)

From Equation 16,

P_{L} = 0.156 mW (the power in the load)

### Reduction Of Even Harmonics

The degree of dc balance between the normal and complementary DAC current sources has a direct impact on the magnitude of even harmonics in the DAC output spectrum. Using a transformer as the output coupling mechanism for the DAC effectively masks any dc imbalance in the DAC outputs. This results in a significant reduction of even harmonics when the spectrum is observed at the output of the transformer.

Transformer coupling can also mask the effects of a dynamic imbalance between the DAC outputs. However, the ability of the transformer to mask an ac imbalance depends on the inherent longitudinal balance of the transformer. Transformers with a high degree of longitudinal balance require that the manufacturer pay special attention to the physical design of the transformer. The most common factor limiting the longitudinal balance of a transformer is parasitic capacitive coupling within the windings. The transformer must be designed in such a way that the parasitic capacitance is evenly distributed relative to the external contacts of the windings.

### Conclusion

A center-tapped transformer can be used to advantage as the
coupling element for a balanced current-output DAC. Formulas
have been presented to determine the load (Z_{NORM} and Z_{COMP})
and voltage (v_{A} and v_{B}) at each DAC output pin, the voltage (v_{S})
across the load (R_{L}), and the power (P_{L}) delivered to the load
(R_{L}). Furthermore, the relationship between the DAC termination resistors (R_{O}), the load resistance (R_{L}), and the transformer
turns ratio (N) was defined.

### Appendix A

#### Transformer Basics

The basic behavior of a transformer is governed by its turns
ratio (or winding ratio). The turns ratio, N, is the ratio of the
number of turns of wire in the secondary windings (N_{S}) to the
number of turns of wire in the primary windings (N_{P}); that is,
N = N_{S}/N_{P}. The turns ratio is often denoted on schematics by
two colon-separated numbers (for example, 3:5). An example
appears in Figure 7 in which an arbitrary turns ratio of A:B is
shown. This leads to the relationship N = N_{S}/N_{P} = B/A.

In Figure 8, a transformer is shown with its primary winding
driven by a voltage source of V_{SRC} (volts rms) that has a series
resistance of R_{SRC} (ohms). The secondary is terminated with
an arbitrary resistance of R_{TERM}. When a transformer is driven
by an ac signal, the ratio of the voltage across the secondary
winding to the voltage across the primary winding is the same
as the turns ratio; that is, v_{S}/v_{P} = N. This gives rise to the
concept of voltage transformation. That is, the primary voltage
is transformed to a secondary voltage (or vice versa) based on
the turns ratio.

Furthermore, conservation of energy requires that the power
exhibited in the primary winding must equal the power appearing in the load of the secondary winding (R_{TERM}). Alternatively, the power exhibited in the secondary winding must equal the
power appearing in the load of the primary winding (R_{SRC}). This
knowledge makes it possible to treat R_{TERM} as though it appears
in the primary circuit as Z_{P} (that is, the secondary impedance
is transformed to an equivalent primary impedance). On the
other hand, R_{SRC} can be treated as though it appears in the
secondary circuit as Z_{S}, (that is, the primary impedance is
transformed to an equivalent secondary impedance). This
property of impedance transformation is related to the turns
ratio and is expressed as: Z_{P} = (1/N^{2}
)R_{TERM} and Z_{S} = (N^{2})R_{SRC}. The concept of impedance transformation is demonstrated by the equivalent circuits shown in Figure 9.

Note that when selecting a transformer, the reader should be aware that some manufacturers specify the impedance transformation ratio rather than the turns ratio. The turns ratio (N) is found by taking the square root of the impedance transformation ratio.

### Appendix B

#### A Balanced Current-Output DAC Driving a Tapped Transformer

Figure 10 shows the general case for a DAC coupled to a tapped
transformer. For completeness, the two primary windings are
not assumed to be symmetrical (that is, the primary tap does
not split the primary winding into two equal halves) and the
two DAC termination resistors are not assumed to be equal
(R_{A} and R_{B}).

The primary winding is split into two separate circuits as a result of the ground connection at the primary tap. The upper winding is referred to as Primary A and the lower winding as Primary B. The windings are labeled A, B, and C to indicate the number of turns associated with each winding (Primary A, Primary B, and secondary, respectively). The overall turns ratio of the transformer is 1:N, where N = C/(A + B). The tapped transformer exhibits the following three independent accoupled networks (the associated turns ratios appear in parentheses):

- Primary A and the secondary (A:C)
- Primary B and the secondary (B:C)
- Primary A and Primary B (A:B)

Also shown in Figure 10 are the transformed impedances at
Primary A (Z_{A}), Primary B (Z_{B}), and the secondary (Z_{S}) along
with the voltages that appear across each winding (v_{A}, v_{B}, and v_{S}).

Since the DAC is assumed to be of the balanced, current-output
variety, Figure 10 can be redrawn as shown in Figure 11. The
DAC is replaced by current sources I_{A} and I_{B}. These represent
sinusoidal current sources with a peak-to-peak amplitude of
I_{MAX} (the maximum output current of the DAC). Also, the
center-tap connection is drawn differently than in Figure 10 to
clearly show that the signal sources exist as separate current loops.

Z_{A} consists of two parallel impedances. The first is the transformed impedance of the secondary resistor (R_{L}), which is
referred to as Z_{1}. The second is the transformed impedance
of R_{B}, which is referred to as Z_{2}. Note that the DAC output
impedance can be ignored under the assumption that the
internal current sources exhibit an infinite impedance (ideally),
which means that the internal impedance of the DAC output
does not impact the parallel combination of Z_{1} and Z_{2}.
Therefore, Z_{A} can be expressed as (see Appendix A regarding
impedance transformation):

Note that the symbol || in this and all subsequent equations can be read as "in parallel with.”

Likewise, the value of Z_{B} consists of two parallel impedances.
The first is the transformed impedance of the secondary resistor
(R_{L}), which is referred to as Z_{3}. The second is the transformed
impedance of R_{A}, which is referred to as Z_{4}. Therefore, Z_{B} can be
expressed as:

Similarly, the value of Z_{S} consists of two parallel impedances.
The first is the transformed impedance of R_{A}, which is referred
to as Z_{5}. The second is the transformed impedance of R_{B}, which
is referred to as Z_{6}. Therefore, Z_{S} can be expressed as:

Referring to Figure 11, the sinusoidal current delivered by the
normal and complementary DAC outputs is given by I_{A} = ½I_{MAX}
+ ½I_{MAX}sin(θ) and IB = ½I_{MAX} − ½I_{MAX}sin(θ), respectively.
However, for ac analysis, the dc term in both equations can be
eliminated, yielding I_{A} = ½I_{MAX} sin(θ) and I_{B} = −½I_{MAX} sin(θ).

Furthermore, in the context of ac analysis, the sine function can be replaced by its rms equivalent, √2/2, which yields

Note that I_{B} = −I_{A}. From these results, Figure 11 can be redrawn
by replacing I_{A} with its rms equivalent and by replacing I_{B} with
–I_{A} (see Figure 12).

The upper current source drives the side of Primary A marked with a dot, while the lower current source drives the side of Primary B that is not marked with a dot. However, the dot associated with Primary B can be moved to the other side of the Primary B winding without impacting the functionality as long as the connection to the signal source is reversed. Reversal of the signal source is equivalent to simply changing its sign. This is shown in Figure 13, where the sign of the lower current source is changed and the dot is moved to the other side of the Primary B winding.

With the modification in Figure 13 it is no longer necessary to
treat I_{A} and I_{B} separately because it is now apparent that

Notice that the load as seen by the current source driving
Primary A is the parallel combination of R_{A} and Z_{A}. Likewise,
the load as seen by the current source driving Primary B is the
parallel combination of R_{B} and Z_{B}. These loads are referred to as
Z_{NORM} and Z_{COMP}, since they are the loads as seen by the normal
and complementary outputs of the DAC, respectively, and are
given as

This result makes it possible to express the voltage generated by each DAC output, which is the product of the DAC output current and the load as seen by the DAC output. The normal and complementary DAC output voltages are expressed as

where *I _{A}* and

*I*have been replaced based on Equation 23.

_{B}The secondary voltage (v_{S}) is made up of the contribution of
each of the primary voltages multiplied by the associated turns
ratio. Specifically,

The two primary voltages (v_{A} and v_{B}) can be derived from v_{S} based on the respective turns ratios, as follows:

The equations derived thus far will work for any generalized
case of a tapped transformer. However, in practice, there are
two simplifications that significantly reduce the complexity of
these equations. The first is to use a center-tapped transformer
(that is, A = B). The second is to use equal DAC termination
resistors (that is, R_{A} = R_{B}) of value R_{O}. Additionally, recall that N = C/(B + A). With the stipulation that A = B, it is possible to show that C/B = C/A = 2N. Applying these concepts to the
previous equations yields the following simplified equations: