AD9608
10-Bit, 125/105 MSPS, 1.8 V Dual Analog-to-Digital Converter
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Features
- 1.8 V analog supply operation
- 1.8 V CMOS or 1.8 V LVDS output
- SNR = 61.7 dBFS at 70 MHz
- SFDR = 85 dBc at 70 MHz
- Low power: 95 mW/channel at 125 MSPS
- Differential analog input with 650 MHz bandwidth
- IF sampling frequencies to 200 MHz
- On-chip voltage reference and sample-and-hold circuit
- 2 Vp-p differential analog input
- DNL = ±0.13 LSB
- See data sheet for additional features
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The AD9608 is a monolithic, dual-channel, 1.8 V supply, 10-bit, 105 MSPS/125 MSPS analog-to-digital converter (ADC) that features a high performance sample-and-hold circuit and an on-chip voltage reference.
The product uses multistage differential pipeline architecture with output error correction logic to provide 10-bit accuracy at 125 MSPS data rates and to guarantee no missing codes over the full operating temperature range.
The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.
The digital output data is presented in offset binary, Gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Logic levels of 1.8 V CMOS and 1.8 V LVDS are supported. Output data can also be multiplexed onto a single output bus.
The AD9608 is available in a 64-lead RoHS-compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).
PRODUCT HIGHLIGHTS
- Operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V CMOS or 1.8 V LVDS logic families.
- The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use.
- Includes a standard serial port interface that supports various product features and functions, such as data output format-ting, internal clock divider, power-down, DCO/data timing, and offset adjustments.
- Packaged in a 64-lead, RoHS-compliant LFCSP that is pin compatible with the AD9650, AD9269 and AD9268 16-bit ADC’s, the AD9258 and AD9648 14-bit ADC, the AD9628 and AD9231 12-bit ADC’s, and the AD9204 10-bit ADC’s, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 125 MSPS.
APPLICATIONS
- Communications
- Diversity radio systems
- I/Q demodulation systems
- Broadband data applications
- Battery-powered instruments
- Hand held scope meters
- Portable medical imaging
- Ultrasound
Ask a Question
Submit your question below and we will return the best answer from ADI’s knowledge database:
Search
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Support
Analog Devices Support Portal is a one-stop shop to answer all your ADI questions.
Visit the ADI Support Page
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AD9608
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Data Sheet 1
User Guide 2
Application Note 12
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev.0)
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev.0)
AN-807: Multicarrier WCDMA Feasibility (Rev.0)
AN-803: Pin Compatible High Speed ADCs Simplify Design Tasks (Rev.0)
AN-808: Multicarrier CDMA2000 Feasibility (Rev.0)
AN-878: High Speed ADC SPI Control Software (Rev.A)
AN-737: How ADIsimADC Models an ADC (Rev.B)
AN-282: Fundamentals of Sampled Data Systems
AN-935: Designing an ADC Transformer-Coupled Front End
AN-1142: Techniques for High Speed ADC PCB Layout
AN-835: Understanding High Speed ADC Testing and Evaluation
AN-905: VisualAnalog™ Converter Evaluation Tool Version 1.0 User Manual
Technical Articles 1
3rd Party Solutions 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9608BCPZ-105 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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| AD9608BCPZ-125 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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| AD9608BCPZRL7-105 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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| AD9608BCPZRL7-125 |
64-Lead LFCSP (9mm x 9mm w/ EP)
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- AD9608BCPZ-105
- Pin/Package Drawing
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64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
- AD9608BCPZ-125
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD9608BCPZRL7-105
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
- AD9608BCPZRL7-125
- Pin/Package Drawing
-
64-Lead LFCSP (9mm x 9mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
Filter by Model
Part Models
Product Lifecycle
PCN
Feb 1, 2024
- 24_0009
Qualification of alternative Wafer Fab for TSMC 0.18um Mixed Signal CMOS Process
AD9608BCPZ-105
PRODUCTION
AD9608BCPZ-125
PRODUCTION
AD9608BCPZRL7-105
PRODUCTION
AD9608BCPZRL7-125
PRODUCTION
Jun 9, 2021
- 20_0126
Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea
AD9608BCPZ-105
PRODUCTION
AD9608BCPZ-125
PRODUCTION
AD9608BCPZRL7-105
PRODUCTION
AD9608BCPZRL7-125
PRODUCTION
Filter by Model
Part Models
Product Lifecycle
PCN
Feb 1, 2024
- 24_0009
Qualification of alternative Wafer Fab for TSMC 0.18um Mixed Signal CMOS Process
AD9608BCPZ-105
PRODUCTION
AD9608BCPZ-125
PRODUCTION
AD9608BCPZRL7-105
PRODUCTION
AD9608BCPZRL7-125
PRODUCTION
Jun 9, 2021
- 20_0126
Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea
AD9608BCPZ-105
PRODUCTION
AD9608BCPZ-125
PRODUCTION
AD9608BCPZRL7-105
PRODUCTION
AD9608BCPZRL7-125
PRODUCTION
Software & Part Ecosystem
| Parts | Product Life Cycle | Description | ||
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Clock Distribution Devices3 |
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RECOMMENDED FOR NEW DESIGNS |
800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs |
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Clock Generation Devices6 |
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NOT RECOMMENDED FOR NEW DESIGNS |
14-Output, Low Jitter Clock generator |
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RECOMMENDED FOR NEW DESIGNS |
Low Jitter Clock Generator with 14 LVPECL/LVDS/HSTL/29 LVCMOS Outputs |
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NOT RECOMMENDED FOR NEW DESIGNS |
6 Output, Dual Loop Clock Generator |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs |
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Digital Control VGAs2 |
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Obsolete |
Wide Dynamic Range, High Speed, Digitally Controlled VGA |
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RECOMMENDED FOR NEW DESIGNS |
Ultralow Distortion IF Dual VGA |
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Fully Differential Amplifiers1 |
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RECOMMENDED FOR NEW DESIGNS |
3.3 GHz Ultralow Distortion RF/IF Differential Amplifier |
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Single-Ended to Differential Amplifiers2 |
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RECOMMENDED FOR NEW DESIGNS |
Ultralow Distortion Current Feedback Differential ADC Driver |
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RECOMMENDED FOR NEW DESIGNS |
Ultralow Distortion Differential ADC Driver (Dual) |
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Can't find the software or driver you need?
Request a Driver/SoftwareEvaluation Kits 2
HSC-ADC-EVALCZ
FPGA-Based Data Capture Kit
Features and Benefits
- 64kB FIFO Depth
- Works with single and multi-channel ADCs
- Use with VisualAnalog® software
- Based on Virtex-4 FPGA
- May require adaptor to interface with some ADC eval boards
- Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
- DDR Encode Rates on each channel
Product Detail
Resources
Software
ZIP
29.79 M
ZIP
ZIP
EVAL-AD9608
AD9608 Evaluation Board
Features and Benefits
- Full featured evaluation board for the AD9608
- SPI interface for setup and control
- External, on-board oscillator, or AD9517 clocking option
- Balun/transformer or amplifier input drive option
- LDO regulator or switching power supply options
- VisualAnalog® and SPI controller software interfaces
Product Detail
The AD9608-125EBZ is an evaluation board for the AD9608, dual 10-bit ADC. This reference design provides all of the support circuitry to operate devices in their various modes and configurations, It is designed to interface directly with the HSC-ADC-EVALCZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device’s hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI controller software package is also compatible with this hardware and allows the user to access the SPI programmable features of the AD9608.
The AD9608 data sheet provides additional information related to device configuration and performance and should be consulted when using these tools. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email highspeed.converters@analog.com.
Resources
2699 kB
Tools & Simulations 4
IBIS Model 1
IBIS Model
S-Parameter 1
Visual Analog
MathWorks® 1
