Features and Benefits
- Two 1.6 GHz, differential clock inputs
- 5 programmable dividers, 1 to 32, all integers
- Phase select for output-to-output coarse delay adjust
- Three independent 1.2 GHz LVPECL outputs
Additive output jitter , 225 fs RMS
- Two independent 800 MHz/250 MHz LVDS/CMOS outputs
Additive output jitter, 275 fs RMS
Fine delay adjust on one output, 5-bit delay words
- 4-wire or 3-wire serial control port
- Space-saving 48-lead LFCSP
- Download AD9512-EP data sheet (pdf)
- Military temperature range (−55°C to +85°C)
- Controlled manufacturing baseline
- One assembly/test site
- One fabrication site
- Enhanced product change notification
- Qualification data available on request
- V62/12656 DSCC Drawing Number
Product DetailsThe AD9512 provides a multi-output clock distribution function for input signals up to 1.6 GHz. The design emphasizes low jitter and low phase noise in order to maximize data converter clocking performance.
Three independent LVPECL and two LVDS clock outputs operate to 1.2 GHz and 800 MHz respectively. Optional CMOS clock outputs available to 250 MHz. Each output has a programmable divider, which may be bypassed or set to divide by any integer up to 32.
Each divider allows the user to change the phase of one clock output relative to another clock output. This phase select functions as a coarse timing adjustment. One output also features a programmable delay element with a user-selected, fullscale range to 10 ns. This fine tuning delay block is programmed with a 5-bit word, which gives the user 32 possible delays from which to choose.
The AD9512 is ideally suited for data converter clocking applications where maximum converter performance is achieved with sub-picosecond jitter encode signals.
The AD9512 is available in a 48-lead LFCSP and is specified from -40°C to +85°C. The part may be run from a single 3.3 V supply.
- Low jitter, low phase noise clock distribution
- Clocking high speed ADCs, DACs, DDS, DDC, DUC, MxFE™ Converters
- Wireless infrastructure transceivers
- High performance instrumentation
- Broadband infrastructure
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Application Notes (10)
Tools & Simulations
AD9512 IBIS Models
ADIsimCLK is the design tool developed specifically for Analog Devices' range of ultra-low jitter clock distribution and clock generation products. Whether your application is in wireless infrastructure, instrumentation, networking, broadband, ATE or other areas demanding predictable clock performance, ADIsimCLK will enable you to rapidly develop, evaluate and optimize your design.
Technical Articles (6)
Press Releases (1)
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Sample & Buy
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