Overview

Features and Benefits

  • 1.8 V analog supply operation
  • 1.8 V to 3.3 V output supply
  • Integrated quadrature error correction (QEC)
  • SNR
    77.6 dBFS at 9.7 MHz input
    71 dBFS at 200 MHz input
  • SFDR
    93 dBc at 9.7 MHz input
    80 dBc at 200 MHz input
  • Low power
    44 mW per channel at 20 MSPS
    100 mW per channel at 80 MSPS
  • Differential input with 700 MHz bandwidth
  • On-chip voltage reference and sample-and-hold circuit
  • 2V p-p differential analog input
  • DNL = −0.5/+1.1 LSB
  • Serial port control options
  • Offset binary, gray code, or twos complement data format
  • Optional clock duty cycle stabilizer (DCS)
  • See data sheet for additional features

Product Details

The AD9269 is a monolithic, dual-channel, 1.8 V supply, 16-bit, 20/40/65/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.

The product uses multistage differential pipeline architecture with output error correction logic to provide 16-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.

The AD9269 incorporates an optional integrated dc correction and quadrature error correction block (QEC) that corrects for dc offset, gain, and phase mismatch between the two channels. This functional block can be very beneficial to complex signal processing applications such as direct conversion receivers.

The ADC also contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).

A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.

The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is pro-vided for each ADC channel to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported, and output data can be multiplexed onto a single output bus.

The AD9269 is available in a 64-lead RoHS-compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).

APPLICATIONS

  • Communications
  • Diversity radio systems
  • Multimode digital receivers
    GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA
  • I/Q demodulation systems
  • Smart antenna systems
  • Battery-powered instruments
  • Hand held scope meters
  • Portable medical imaging
  • Ultrasound
  • Radar/LIDAR

Product Lifecycle icon-recommended Recommended for New Designs

This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.

Evaluation Kits (2)

Documentation & Resources

  • View All (15)
  • Data Sheets (1)
  • Application Notes (9)
  • User Guides (2)
  • Technical Articles (3)
  • Tools & Simulations

    Virtual Eval - BETA

    Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.

    VirtualEval

    Design Tools

    Visual Analog

    For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.

    ADIsimRF

    ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.

    Product Recommendations

    AD9269 Companion Parts

    Recommended Clock Drivers

    Recommended Driver Amplifiers

    Recommended VGA's

    • For an independent, dual channel, digitally controlled VGA: AD8372.
    • For an ultralow distortion, IF dual channel VGA: AD8376, ADRF6516.

    Design Resources

    ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

    PCN-PDN Information

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    Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.