AN-2061: Wideband Bias Tee Design Using 0402, SMD Components

INTRODUCTION

Figure 1 shows a typical circuit that provides bias current to an RF amplifier. In general, the RF output terminal of an RF amplifier is the drain or collector of the main power transistor. Although this node is the RF output, a bias current must also be provided. This current is generally provided through an inductor (L1 in Figure 1). The RF output is separated from this dc biasing by an ac coupling capacitor (C2 in Figure 1). This arrangement of the inductor and the ac coupling capacitor is commonly referred to as a bias tee.

Figure 1. Typical RF Biasing Using a Bias Tee

A wideband bias tee design is challenging. Careful printed circuit board (PCB) design along with inductor and ac coupling capacitor choices are critical. Parasitic effects significantly impact performance, manifesting as degraded gain response vs. frequency.

Conical chokes are often used as the bias inductor in wideband applications because these chokes are relatively free of resonances. However, conical chokes are relatively expensive, difficult to mount, fragile, and physically large (compare the relative sizes of L1 and C2 in Figure 2).

Figure 2. Evaluation Board Design Using Conical Choke and Typical Dimensions of a Conical Choke

This application note presents a wideband bias tee design that uses 0402 sized surface-mount inductors and capacitors (and one optional 0805 sized component) to provide wideband drain bias for the HMC994APM5E, a dc to 28 GHz gallium arsenide (GaAs), pseudomorphic high electron mobility transistor (pHEMT), monolithic microwave integrated circuit (MMIC), power amplifier. Although the design focuses on the HMC994APM5E, the components and design methodology are applicable to other wideband amplifiers.

HMC994APM5E EVALUATION BOARD DESIGN WITH INTEGRATED BIAS TEE

The default customer evaluation board for the HMC994APM5E (EV1HMC994APM5) provides no on-board drain biasing. Providing drain current and ac coupling of the RF output requires an external connectorized bias tee. Note that the Marki Microwave BT2-0040 was used to characterize the HMC994APM5E. Figure 4 shows a schematic of a revision of the HMC994APM5 evaluation board that includes a surface-mount wideband bias tee circuit. This 2-layer board uses 10 mil Rogers 4350B. The layout of the top board layer is shown in Figure 11 (the Gerber files are available from Analog Devices, Inc., on request).

The default operating conditions for the circuit are the following:

V_DD = 10 V
V_GG1 ≈ −0.5 V
V_GG2 = 3.5 V
Quiescent drain current (I_DQ) = 250 mA

When designing drain biasing networks, it is important to consider the maximum drain current (I_DD) that the circuit is expected to draw with a RF present. The I_DD value directly impacts inductor choices based on their maximum current ratings. Figure 3 shows I_DD vs. RF output power for the HMC994APM5E at various frequencies.

Figure 3. HMC994APM5E IDD vs. Output Power at Various Frequencies

In this example, the operation target is up to 22 GHz with a maximum output power of 29 dBm. Based on this, the target maximum I_DD value that the circuit must support is defined as 310 mA.

The schematic and frequency response of the circuit are shown in Figure 4 and Figure 5, respectively.

Figure 4. HMC994APM5E Evaluation Board Schematic Using Surface-Mount Bias Tee with Recommended Components for Operation from 10 MHz to 22 GHz

Figure 5. Gain and Output Return Loss vs. Frequency of HMC994APM5E, Application Circuit Shown in Figure 4

Although the HMC994APM5E is specified to operate up to 28 GHz, the surface-mount bias tee circuit shown in Figure 4 limits operation to approximately 22 GHz, as evidenced by the roll-off of the gain above 22 GHz, as shown in Figure 5.

The wideband biasing circuit consists of three surface-mount inductors, an output ac coupling capacitor, and an RF and power supply decoupling network.

Inductor L1 is critical to achieving high frequency operation. Various layout experiments have determined that optimal performance is achieved when L1 touches down directly on the RF trace (see the layout shown in Figure 11).

Inductor L2 is also a critical component that must be placed as close as possible to L1 because a longer trace adds inductance and capacitance. Inductor L2 mitigates resonances caused by the interaction of Inductor L1 and the PCB.

Inductor L3 is only needed if operation at or below 100 MHz is required. Otherwise, L3 can be omitted.

Selection of all three inductors is based on the required operating frequency range, self resonant frequency, and maximum current rating.

Ferrite beads have lower capacitive parasitics than ceramic inductors, especially at high frequencies. As a result, ensure that L1 and L2 are ferrite beads with a high resonant frequency and that L1 and L2 have adequate margin on their maximum current ratings.

The output ac coupling capacitor, C_OUT, is also critical to achieving high frequency operation. The maximum voltage rating of the capacitor is also a critical consideration. Because this capacitor is essentially a dc block capacitor, the voltage across the capacitor is roughly the same as the applied dc bias voltage. In this case, with V_DD equal to 10 V, choosing a capacitor with a maximum voltage rating of 16 V is appropriate.

Bypass Capacitors C12 and C13 and de-Q Resistors R2 and R3 reduce RF coupling from the PCB and filter out power supply noise. Typically, the location of the smaller capacitor is closer to the amplifier.

De-Q resistors can sometimes be used to eliminate resonances caused by the RF and power supply decoupling capacitors and the PCB layout. Generally, the de-Q resistors value is determined experimentally. In some cases, de-Q resistors degrade performance. As a result, it is good practice to include pads in the PCB design. If the presence of de-Q resistors is determined to be unnecessary or detrimental, 0 Ω resistors can be placed on the pads.

The RF output trace must maintain a 50 Ω characteristic impedance, implemented using a grounded coplanar waveguide (GPWG) with appropriate trace dimensions and distances with ground vias on the adjacent ground planes.

The following sections focus on design and component choices of the individual elements of this wideband bias tee circuit.

DESIGNING THE RF AND POWER SUPPLY DECOUPLING NETWORK

This section explores the effect of the de-Q resistors (R2 and R3) and bypass capacitors (C12 and C13).

Decoupling components (R2, R3, C12, and C13) reduce RF coupling and filter out power supply noise. R2 and R3 are de-Q resistors that reduce frequency glitches caused by interactions between the PCB and the decoupling capacitors.

Figure 6 shows the circuit details of the wideband surface-mount bias tee with a focus on R2, R3, C12, and C13.

Figure 6. Circuit Detail of the Wideband Bias Tee Circuit (R2, R3, C12, and C13 Focus), Case 3 Shown

The three cases detailed in Table 1 were considered in this application note. Bypass capacitors (C12 and C13) and de-Q resistors (R1 and R2) are varied while the values of the other components in the network are held constant as follows:

C_OUT = 0.1 μF (ATC 560L104YTT)
L1 = L2 = 56 nH (0402DF-560XJR)
L3 = 1 μH (0805LS-102XJLB)

Figure 7 and Figure 8 show the resulting low frequency and high frequency responses.

Figure 7. Bypass Capacitor and De-Q Resistor Effects, Low Frequency Response

Figure 8. Bypass Capacitor and De-Q Resistor Effects, High Frequency Response

Case 3, where R3 = 340 Ω, R2 = 0 Ω, C12 = 100 pF, and C13 = 10 nF, shows the best overall frequency responses up to 22 GHz (see Figure 8), which includes a potentially useful slight positive gain slope vs. frequency. Case 3 shows that setting R3 to 340 Ω improves the low frequency performance (see Figure 7), eliminating a significant dip in the frequency response at 12 MHz, which is present in Case 2, where R3 = 0 Ω. As a result, for all subsequent experiments, these de-Q resistor values (R3 = 340 Ω and R2 = 0 Ω) are used.

Case 1, where no power supply decoupling capacitors are used, shows good performance, even extending the high frequency bandwidth up to 24 GHz. However, the gain response does have a dip at approximately 500 MHz. In addition, it is impractical and risky to forgo the use of RF and power supply decoupling capacitors in this circuit. Therefore, this implementation is not recommended.

THE EFFECT OF INDUCTORS ON FREQUENCY RESPONSE

LOW FREQUENCY BIAS INDUCTOR (L3)

Figure 9 shows the circuit detail of the wideband surface-mount bias tee network with a focus on L3. L3 is only needed if operation below 100 MHz is required. Otherwise, L3 can be omitted.

Figure 9. Circuit Detail of the Wideband Integrated Bias Tee (L3 Focus), Case 1 Shown

Selection of L3 is based on the desired frequency response (10 MHz to 22 GHz) and the maximum current requirement (I_DD = 310 mA). In this case, an 0805 sized component was selected to meet the frequency and current ratings target specifications.

Four cases are compared, as detailed in Table 2. L3 is varied while all other component values are held constant as follows:

COUT = 0.1 μF (ATC 560L104YTT)
L1 = L2 = 56 nH (0402DF-560XJR)
C12 = 100 pF (CC0402JRN-PO9BN101)
R3 = 340 Ω (ERA-2AEB3400X)
C13 = 10 nF (TDK_C1005X7S2-A103K050BB)
R2 = 0 Ω (ERJ-2GE0R00X)

Figure 10 shows the resulting low frequency response for these four cases.

Figure 10. Effects of L3 Inductor, Low Frequency Response

The component choice depends on the lowest required operating frequency and the maximum current that must be supported. In terms of the lowest usable frequency, Case 1, where L3 = 1 μH, gives the best results. However, this 1 μH inductor has the lowest maximum current rating of the four devices evaluated (350 mA recommended maximum current, assuming 30% margin on the recommended maximum of the manufacturer).

By contrast, Case 4, where L3 is not used, gives the highest minimum operating frequency of approximately 100 MHz.

Case 2 and Case 3 provide a compromise between these extremes. With L3 = 0.47 μH, operation down to 20 MHz is possible with a maximum current of 504 mA. With L3 = 0.11 μH, operation down to 60 MHz is possible with a maximum current of 1400 mA. The default values for L1 and L2 can support a maximum current of 840 mA, assuming 30% margin on their specified maximum.

Table 2 shows all four cases with component values, product numbers, and associated maximum current ratings of these component values. In all cases, the recommended maximum current is 30% lower than the specified maximum current of the manufacturer.

HIGH FREQUENCY BIAS INDUCTORS (L1 AND L2)

This section explores the effect of adding a second inductor, L2, in series with the L1 inductor and provides solutions for operation from 10 MHz to 20 GHz, 10 MHz to 22 GHz, and 12 GHz to 28 GHz.

Adding L2 in series with L1 mitigates resonances caused by interactions between L1 and the PCB. L1 must touch down on the RFOUT trace and, to be effective, place L2 as close as possible to L1. See Figure 11 and Figure 12 for the layout and photograph of the top layer of the modified HMC994APM5E evaluation board with the on-board surface-mount bias tee.

Figure 11. Layout of the Top Layer of the Modified HMC994APM5E Evaluation Board with the On-Board Bias Tee

Figure 12. Photograph of the Top Layer of the Modified HMC994APM5E Evaluation Board with the On-Board Bias Tee

Two cases are compared in this section. Performance is first compared with L2 set to 56 nH (0402DF-560XJR). Then, L2 set to 0 Ω. All other component values are held constant as follows:

C_OUT = 0.1 μF (ATC 560L104YTT)
L1 = 56 nH (0402DF-560XJR)
L3 = 1 μH (0805LS-102XJLB)
C12 = 100 pF (CC0402JRN-PO9BN101)
R3 = 340 Ω (ERA-2AEB3400X)
C13 = 10 nF (TDK_C1005X7S2-A103K050BB)
R2 = 0 Ω (ERJ-2GE0R00X)

Figure 13 and Figure 14 show the resulting low and high frequency responses. Setting L2 to 56 nH (0402DF-560XJR) and also equal to the L1 value has a significant impact on the high frequency response (see Figure 14). Small gain peaking is flattened out at around 9.5 GHz as well as pushing out a large resonance from approximately 19.5 GHz to 24.5 GHz.

Figure 13. Effects of Adding a Second Inductor, L2, in Series with Inductor L1, Low Frequency Response

Figure 14. Effects of Adding a Second Inductor, L2, in Series with Inductor L1, High Frequency Response

By setting L1 = L2 = 56 nH and using the other component values shown in Figure 15, a wideband response is achieved from 10 MHz to 22 GHz.

Figure 15. Circuit Detail of the Wideband Integrated Bias Tee (L1 and L2 Focus)

The 56 nH inductor has a recommended maximum current rating of 840 mA (assuming 30% margin on the recommendation of the manufacturer). However, the 1 μH L3 inductor has a recommended 350 mA maximum current. Therefore, L3 is the limiting factor to the maximum current that the circuit can support. As previously noted, if operation below 10 MHz is not required, L3 can be omitted so that the higher currents can be supported.

Where more bias current is required, the L3 value can be changed (see Table 2), however, at the expense of gain roll-off at lower frequencies (see Figure 10).

By changing L1 from 56 nH (0402DF-560XJR) to 20 nH (0402DF-200XJR), bandwidth can extend to 28 GHz, however, at the expense of gain roll-off below 11 GHz (see Figure 16 and Figure 17).

Figure 16. Gain Comparison Solution 10 MHz to 22 GHz vs. 12 GHz to 28 GHz when L1 Is Changed from 56 nH to 20 nH

Figure 17. Gain and Output Return Loss Comparison Solution 10 MHz to 22 GHz vs. 12 GHz to 28 GHz when L1 Is Changed from 56 nH to 20 nH

The circuit shown in Figure 18 represents a wideband bias tee solution from 12 GHz to 28 GHz with a maximum recommended current limit of 840 mA including a margin of 30%. Because the low frequency response is not important, L3 can be removed (or replaced with a 0 Ω resistor).

Figure 18. Recommended Circuit for Operation from 12 GHz to 28 GHz

THE EFFECT OF THE OUTPUT AC COUPLING CAPACITOR ON FREQUENCY RESPONSE

The effect of varying the C_OUT capacitor is explored in this section. C_OUT is critical to maintaining a wideband frequency response. This capacitor must also have a voltage rating that can support the bias voltage of the application. In this case, the HMC994APM5E has a V_DD bias voltage of 10 V. Assuming some margin, a voltage rating of at least 16 V for C_OUT is appropriate.

The insertion loss of this capacitor is also important because this loss directly impacts the overall gain of the circuit.

Figure 19 shows the circuit detail of the wideband surface-mount bias tee with a focus on C_OUT.

Figure 19. Circuit Detail of the Wideband Integrated Bias Tee (COUT Focus)

Two cases are examined. The frequency response is measured with two different 0.1 μF output coupling capacitors, 560L104YTT from American Technical Ceramics (ATC) and 0402BB103 from Passive Plus, Inc. (PPI). These capacitors have a maximum voltage rating of 16 V and 50 V, respectively.

All other component values are set to their default values as follows:

L1 = L2 = 56 nH (0402DF-560XJR)
L3 = 1 μH (0805LS-102XJLB)
C12 = 100 pF (CC0402JRNPO9BN101)
R3 = 340 Ω (ERA-2AEB3400X)
C13 = 10 nF (C1005X7S2A103K050BB)
R2 = 0 Ω (ERJ-2GE0R00X)

Figure 20 and Figure 21 show the gain and output return loss response comparison between these two cases.

The circuit exhibits a slightly flatter frequency response and equal or higher gain at all frequencies when the ATC capacitor was used.

Figure 20. Gain vs. Frequency for C_OUT = ATC 560L104YTT and C_OUT = PPI 0402BB103

Figure 21. Gain and Output Return Loss vs. Frequency for C_OUT = ATC 560L104YTT and C_OUT = PPI 0402BB103

PERFORMANCE COMPARISON BETWEEN A DISCRETE SURFACE-MOUNT BIAS TEE CIRCUIT AND A CONNECTORIZED EXTERNAL BIAS TEE

This section compares the default surface-mount biasing circuit with the performance achieved when a connectorized external bias tee is used (Marki Microwave BT2-0040).

Figure 22 shows the schematic of the surface-mount bias tee circuit that was shown to provide a flat frequency response from 10 MHz to 22 GHz.

Figure 22. Circuit Detail of the Wideband Integrated Bias Tee

Figure 23, Figure 24, and Figure 25 show gain, output return loss response, and input return loss comparisons between the following two cases:

Discrete surface-mount bias tee
Connectorized external bias tee with insertion loss de-embedded

Figure 23. Gain vs. Frequency Comparison of Discrete Surface-Mount Bias Tee vs. Connectorized External Bias Tee

Figure 24. Gain and Output Return Loss vs. Frequency Comparison of Discrete Surface-Mount Bias Tee vs. External Connectorized Bias Tee

Figure 25. Input Return Loss vs. Frequency Comparison of Discrete Surface-Mount Bias Tee vs. External Connectorized Bias Tee

CONCLUSIONS

Design of discrete wideband bias tee circuits using surface-mount components is challenging due to the criticality of good PCB design and appropriate component selection. Component selection involves multiple considerations such as device bandwidth along with maximum voltage and current ratings.

As has been described throughout this application note, different components affect either the low or high frequency response. The L1 and L2 inductors and the COUT ac coupling affect high frequency response, whereas the L3 inductor affects the low frequency response. The C12 and C13 bypass capacitors and R2 and R3 de-Q resistors are needed to limit RF coupling and to filter power supply noise. While power supply decoupling capacitors are always required, the presence of de-Q resistors can enhance or degrade performance. Therefore, trial and error is necessary, and it is useful, to incorporate extra PCB pads for these components.

Ensure that L1 and L2 are ferrite beads because of their low parasitics at high frequencies.

The C_OUT ac coupling capacitor must have a wideband frequency response. Its voltage rating must be greater than the V_DD bias voltage. In general, when selecting components based on their maximum current and maximum voltage rating, assume a 30% margin, that is, the maximum current or voltage that the component sees must be 30% lower than the recommended maximum of the manufacturer.

Compared to a conical choke-based bias inductor a discrete surface-mount circuit will be cheaper and less physically fragile.

Table 4 summarizes the circuits that were presented where L1, L2, and L3 were varied along with the associated frequency ranges and the maximum current ratings that were achieved. For all these cases, the same power supply decoupling network was used (that is, R2 = 0 Ω, R3 = 340 Ω, C12 = 100 pF, and C13 = 10 nF). Table 5 lists the product numbers of the manufacturers for all of the components used.