The EV2HMC998APM5 consists of a 2-layer printed circuit board (PCB) fabricated from 10 mil thick, Rogers 4350B, copper clad, mounted to an aluminum heat spreader. The heat spreader assists in providing thermal relief to the device as well as mechanical support to the PCB. Mounting holes on the heat spreader allow it to be attached to a heat sink for improved thermal management. The RFIN and RFOUT ports are populated with 2.9 mm, female coaxial connectors, and their respective RF traces have a 50 Ω characteristic impedance.

The EV2HMC998APM5 differs from the EV1HMC998APM5 in one key respect. Whereas the EV1HMC998APM5 requires an external connectorized bias tee on its RFOUT port to operate (see the HMC998APM5E data sheet for additional details), the EV2HMC998APM5 contains an on-board, surface-mount bias tee circuit. This circuit allows the EV2HMC998APM5 to connect directly to RF test equipment, such as network analyzers and spectrum analyzers. This on-board, surface-mount bias tee circuit has an operating frequency up to approximately 22 GHz (see Figure 3).

The EV2HMC998APM5 is populated with components suitable for use over the entire operating temperature range of the HMC998APM5E. To calibrate out board trace losses, a through calibration path, THRU-CAL, is provided between the J5 and J6 connectors. J5 and J6 must be populated with 2.92 mm RF connectors to use the through calibration path. Refer to Figure 4 and Table 2 for the through calibration path performance. The power voltages, ground voltages, gate control voltages, and detector output voltages are accessed through two 4-pin headers, J3 and J4 (see Table 1).

The RF traces are 50 Ω, grounded, coplanar waveguide. The package ground leads and the exposed paddle connect directly to the ground plane. Multiple vias are used to connect the top and bottom ground planes, with particular focus on the area directly beneath the ground paddle, to provide adequate electrical and thermal conduction to the heat spreader.

The decoupling capacitors on the EV2HMC998APM5 represent the configuration used to measure the performance of the circuit, which is detailed in AN-2061. It is possible to reduce the number of capacitors connected to the ACG2, ACG3/ACG4, VGG1, and VGG2 pins, but this reduction varies from system to system. It is recommended to first remove the largest capacitors that are farthest from the HMC998APM5E when reducing the number of capacitors.

For full details on the HMC998APM5E, see the HMC998APM5E data sheet, which must be consulted in conjunction with this user guide when using the EV2HMC998APM5.