AD9628

RECOMMENDED FOR NEW DESIGNS

12-Bit, 125/105 MSPS, 1.8 V Dual Analog-to-Digital Converter

Data Sheet (Rev. C) Product Selection Table
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Overview

  • 1.8 V analog supply operation
  • 1.8 V CMOS or LVDS outputs
  • SNR = 71.2 dBFS at 70 MHz
  • SFDR = 93 dBc at 70 MHz
  • Low power: 101 mW/channel at 125 MSPS
  • Differential analog input with 650 MHz bandwidth
  • IF sampling frequencies to 200 MHz
  • On-chip voltage reference and sample-and-hold circuit
  • 2 V p-p differential analog input
  • DNL = ±0.25 LSB
  • See data sheet for additional features

The AD9628 is a monolithic, dual-channel, 1.8 V supply, 12-bit, 125 MSPS/105 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference.

The product uses multistage differential pipeline architecture with output error correction logic to provide 12-bit accuracy at 125 MSPS data rates and to guarantee no missing codes over the full operating temperature range.

The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).

A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.

The digital output data is presented in offset binary, Gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. 1.8 V CMOS or LVDS output logic levels are supported. Output data can also be multiplexed onto a single output bus.

APPLICATIONS

  • Communications
  • Diversity radio systems
  • Multimode digital receivers
    GSM, EDGE, W-CDMA, LTE, CDMA2000, WIMAX, TD-SCDMA
  • I/Q demodulation systems
  • Smart antenna systems
  • Broadband data applications
  • Battery-powered instruments
  • Hand-held scope meters
  • Portable medical imaging
  • Ultrasound
  • Radar/LIDAR

PRODUCT HIGHLIGHTS

  1. The AD9628 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V CMOS or LVDS logic families. 
  2. The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use. 
  3. A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO/data timing and offset adjustments. 
  4. The AD9628 is packaged in a 64-lead RoHS-compliant LFCSP that is pin compatible with the AD9650 / AD9269 / AD9268 16-bit ADC, the AD9258 / AD9251 / AD9648 14-bit ADCs, the AD9231 12-bit ADC, and the AD9608 / AD9204 10-bit ADCs, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20MSPS to 125MSPS.
AD9628
12-Bit, 125/105 MSPS, 1.8 V Dual Analog-to-Digital Converter
AD9628 Functional Block Diagram AD9628 Pin Configuration
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Documentation

Data Sheet 1

User Guide 2

Application Note 11

Technical Articles 1

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Software Resources

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Hardware Ecosystem

Parts Product Life Cycle Description
Clock ICs 9
AD9510
RECOMMENDED FOR NEW DESIGNS 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs
AD9511
RECOMMENDED FOR NEW DESIGNS 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs
AD9512
RECOMMENDED FOR NEW DESIGNS 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs
AD9513
RECOMMENDED FOR NEW DESIGNS 800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs
AD9514
RECOMMENDED FOR NEW DESIGNS 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs
AD9515
RECOMMENDED FOR NEW DESIGNS 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs
AD9523
NOT RECOMMENDED FOR NEW DESIGNS 14-Output, Low Jitter Clock generator
AD9523-1
RECOMMENDED FOR NEW DESIGNS Low Jitter Clock Generator with 14 LVPECL/LVDS/HSTL/29 LVCMOS Outputs
AD9524
NOT RECOMMENDED FOR NEW DESIGNS 6 Output, Dual Loop Clock Generator
Differential Amplifiers 3
ADA4927-2
RECOMMENDED FOR NEW DESIGNS Ultralow Distortion Current Feedback Differential ADC Driver
ADA4938-2
RECOMMENDED FOR NEW DESIGNS Ultralow Distortion Differential ADC Driver (Dual)
ADL5562
RECOMMENDED FOR NEW DESIGNS 3.3 GHz Ultralow Distortion RF/IF Differential Amplifier
Variable Gain Amplifiers (VGA) 2
ADL5202
Obsolete Wide Dynamic Range, High Speed, Digitally Controlled VGA
AD8376
RECOMMENDED FOR NEW DESIGNS Ultralow Distortion IF Dual VGA
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Tools & Simulations

Virtual Eval - BETA

Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.

Open Tool

AD9628 IBIS Model 1

Visual Analog

For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.

Open Tool

S-Parameter 1

AD9628 Simulink ADIsimADC Model

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Evaluation Kits

eval board
schematic 1
HSC-ADC-EVALCZ

FPGA-Based Data Capture Kit

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Features and Benefits

  • 64kB FIFO Depth
  • Works with single and multi-channel ADCs
  • Use with VisualAnalog® software
  • Based on Virtex-4 FPGA
  • May require adaptor to interface with some ADC eval boards
  • Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
  • DDR Encode Rates on each channel

Product Details

The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.

eval board
schematic 2
schematic 3
schematic 4
EVAL-AD9628

AD9628 Evaluation Board

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Features and Benefits

  • Full featured evaluation board for the AD9628
  • SPI interface for setup and control
  • External, on-board oscillator, or AD9517 clocking option
  • Balun/transformer or amplifier input drive option
  • LDO regulator or switching power supply options
  • VisualAnalog® and SPI controller software interfaces

Product Details

The AD9628-125EBZ is an evaluation board for the AD9628, dual 12-bit ADC. This reference design provides all of the support circuitry to operate devices in their various modes and configurations, It is designed to interface directly with the HSC-ADC-EVALCZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device’s hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI controller software package is also compatible with this hardware and allows the user to access the SPI programmable features of the AD9628.

The AD9628 data sheet provides additional information related to device configuration and performance and should be consulted when using these tools. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email highspeed.converters@analog.com.
HSC-ADC-EVALCZ
FPGA-Based Data Capture Kit
High_Speed_ADC_evalboard_05
EVAL-AD9628
AD9628 Evaluation Board
Dual 10-16 bit 20-125MSPS ADC Evaluation Board - Angle View Dual 10-16 bit 20-125MSPS ADC Evaluation Board - Top View Dual 10-16 bit 20-125MSPS ADC Evaluation Board - Bottom View

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