The AD9253 is a quad, 14-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC) with an on-chip sampleand- hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.
The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual-channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
The AD9253 is available in a RoHS-compliant, 48-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.
|Title||Content Type||File Type|
|AD9253: Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter (Rev 0, 10/2011) (pdf, 1268 kB)||Data Sheets|
|AN-1142: Techniques for High Speed ADC PCB Layout (pdf, 392 kB)||Application Notes|
|AN-878: High Speed ADC SPI Control Software (pdf, 585 kB)||Application Notes|
|AN-737: How ADIsimADC Models an ADC (pdf, 373 kB)||Application Notes|
|AN-807: Multicarrier WCDMA Feasibility (pdf, 969 kB)||Application Notes|
AN-808: Multicarrier CDMA2000 Feasibility
(pdf, 1535 kB)
The goal of this application note is to determine the feasibility of implementing a multicarrier CDMA2000 transceiver and what the major subsystem performances must be.
|AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (pdf, 203 kB)||Application Notes|
|AN-877: Interfacing to High Speed ADCs via SPI (pdf, 1594 kB)||Application Notes|
|AN-905: VisualAnalog Converter Evaluation Tool Version 1.0 User Manual (pdf, 2124 kB)||Application Notes|
|AN-935: Designing an ADC Transformer-Coupled Front End (pdf, 363 kB)||Application Notes|
|AN-835: Understanding High Speed ADC Testing and Evaluation (pdf, 985 kB)||Application Notes|
AN-586: LVDS Outputs for High Speed A/D Converters
(pdf, 207 kB)
High Speed ADCs Uses LVDS (Low-Voltage Differential Signaling) to Minimize Performance Limitations In ADC Applications When Providing High Speed Data Output
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (pdf, 452,449 bytes)
(pdf, 441 kB)
This application note describes the operation of a general-purpose, microcontroller-based Serial Port Interface (SPI) boot circuit.
|AN-742: Frequency Domain Response of Switched-Capacitor ADCs (pdf, 401 kB)||Application Notes|
|AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (pdf, 370 kB)||Application Notes|
|AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (pdf, 291 kB)||Application Notes|
AN-501: Aperture Uncertainty and ADC System Performance
(pdf, 227 kB)
A Key Concern in IF Sampling is that of Aperture Uncertainty (Jitter)
Evaluating the AD9253/AD9633/AD9653 Analog-to-Digital Converters
|MS-2210: Designing Power Supplies for High Speed ADC (pdf, 327 kB)||Technical Articles|
|High-speed A/D Converters Feature More Channels, Lower Power and Smaller Package Size (10 Nov 2011)||Press Releases||HTML|
|Glossary of EE Terms||Glossary||HTML|
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ADIsimADC is Analog Devices' Analog-to-Digital Behavioral Model that accurately models the typical performance characteristics of many of our High Speed Converters. The model faithfully reproduces the errors associated with both static and dynamic features such as AC linearity, clock jitter, and many other product specific anomalies.
|ADIsim Design/Simulation Tools||HTML|
|AD9253 IBIS Model||IBIS Models||HTML|
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|Price*(100-499)||Price*1000 pcs||RoHS||View PCN/ PDN||Check Inventory/
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.