AD9633
RECOMMENDED FOR NEW DESIGNSQuad, 12-Bit, 80/105/125 MSPS, Serial LVDS 1.8 V ADC
- Part Models
- 6
- 1ku List Price
- Starting From $56.75
Part Details
- 1.8 V supply operation
- Low power: 100 mW per channel at 125 MSPS with scalable power options
- SNR = 71 dB (to Nyquist)
- SFDR = 91 dBc (to Nyquist)
- DNL = ±0.3 LSB (typical); INL = ±0.5 LSB (typical)
- Serial LVDS (ANSI-644, default) and low power, reduced signal option (similar to IEEE 1596.3)
- 650 MHz full power analog bandwidth
- 2 V P-P input voltage range
- Serial port control
- Full chip and individual channel power-down modes
- Flexible bit orientation
- Built-in and custom digital test pattern generation
- Multichip sync and clock divider
- Programmable output clock and data alignment
- Programmable output resolution
- Standby mode
The AD9633 is a quad, 12-bit, 80 MSPS/105 MSPS/125 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.
The ADC requires a single 1.8 V power supply and LVPECL-/CMOS-/LVDS-compatible sample rate clock for full performance operation. No external reference or driver components are required for many applications.
The ADC automatically multiplies the sample rate clock for the appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided. Individual-channel power-down is supported and typically consumes less than 2 mW when all channels are disabled.
The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
The AD9633 is available in a RoHS-compliant, 48-lead LFCSP. It is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.
Applications
- Medical ultrasound
- High speed imaging
- Quadrature radio receivers
- Diversity radio receivers
- Test equipment
Documentation
Data Sheet 1
User Guide 1
Application Note 8
Technical Articles 1
Evaluation Design File 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9633BCPZ-105 | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) | ||
| AD9633BCPZ-125 | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) | ||
| AD9633BCPZ-80 | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) | ||
| AD9633BCPZRL7-105 | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) | ||
| AD9633BCPZRL7-125 | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) | ||
| AD9633BCPZRL7-80 | 48-Lead LFCSP (7mm x 7mm x 0.75mm w/ EP) |
| Part Models | Product Lifecycle | PCN |
|---|---|---|
| No Match Found | ||
|
Feb 1, 2024 - 24_0009 Qualification of alternative Wafer Fab for TSMC 0.18um Mixed Signal CMOS Process |
||
| AD9633BCPZ-105 | PRODUCTION | |
| AD9633BCPZ-125 | PRODUCTION | |
| AD9633BCPZ-80 | PRODUCTION | |
| AD9633BCPZRL7-105 | PRODUCTION | |
| AD9633BCPZRL7-125 | PRODUCTION | |
| AD9633BCPZRL7-80 | PRODUCTION | |
|
May 23, 2014 - 13_0233 Assembly Transfer of Select 6x6 and 7x7mm LFCSP Products to STATS ChipPAC China. |
||
| AD9633BCPZ-105 | PRODUCTION | |
| AD9633BCPZ-125 | PRODUCTION | |
| AD9633BCPZ-80 | PRODUCTION | |
| AD9633BCPZRL7-105 | PRODUCTION | |
| AD9633BCPZRL7-125 | PRODUCTION | |
| AD9633BCPZRL7-80 | PRODUCTION | |
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
| Parts | Product Life Cycle | Description |
|---|---|---|
| Analog Control Variable Gain Amplifiers (VGAs) 1 | ||
| AD8334 | PRODUCTION | Quad VGA with Ultralow Noise Preamplifier and Programmable RIN |
| Clock Distribution Devices 3 | ||
| AD9513 | RECOMMENDED FOR NEW DESIGNS | 800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
| AD9514 | RECOMMENDED FOR NEW DESIGNS | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
| AD9515 | RECOMMENDED FOR NEW DESIGNS | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs |
| Clock Generation Devices 6 | ||
| AD9523 | NOT RECOMMENDED FOR NEW DESIGNS | 14-Output, Low Jitter Clock generator |
| AD9523-1 | RECOMMENDED FOR NEW DESIGNS | Low Jitter Clock Generator with 14 LVPECL/LVDS/HSTL/29 LVCMOS Outputs |
| AD9524 | NOT RECOMMENDED FOR NEW DESIGNS | 6 Output, Dual Loop Clock Generator |
| AD9510 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs |
| AD9511 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs |
| AD9512 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs |
| Digital Control VGAs 1 | ||
| ADL5202 | Obsolete | Wide Dynamic Range, High Speed, Digitally Controlled VGA |
| Fully Differential Amplifiers 1 | ||
| ADL5562 | RECOMMENDED FOR NEW DESIGNS | 3.3 GHz Ultralow Distortion RF/IF Differential Amplifier |
| Single-Ended to Differential Amplifiers 3 | ||
| ADA4927-2 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Current Feedback Differential ADC Driver |
| ADA4937-2 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Differential ADC Driver (Dual) |
| ADA4938-2 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Differential ADC Driver (Dual) |
Tools & Simulations
Virtual Eval - BETA
Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.
Open ToolAD9633 IBIS Model 1
Visual Analog
For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.
Open ToolAD9633 Simulink ADIsimADC Model
Open ToolEvaluation Kits
AD9633 Evaluation Board
Resources
FPGA-Based Data Capture Kit