AD9642
RECOMMENDED FOR NEW DESIGNS14-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter (ADC)
- Part Models
- 6
- 1ku List Price
- Starting From $49.31
Part Details
- SNR = 71.0 dBFS at 185 MHz AIN and 250 MSPS
- SFDR = 83 dBc at 185 MHz AIN and 250 MSPS
- −152.0 dBFS/Hz input noise at 200 MHz, −1 dBFS AIN, 250 MSPS
- Total power consumption:
390 mW at 250 MSPS - 1.8 V supply voltages
- LVDS (ANSI-644 levels) outputs
- Integer 1-to-8 input clock divider (625 MHz maximum input)
- Sample rates of up to 250 MSPS
- IF sampling frequencies of up to 350 MHz
- Internal ADC voltage reference
- Flexible analog input range 1.4 Vp-p to 2.0 V p-p (1.75 Vp-p nominal)
- See data sheet for additional features
The AD9642 is a 14-bit analog-to-digital converter (ADC) with sampling speeds of up to 250 MSPS. The AD9642 is designed to support communications applications, where low cost, small size, wide bandwidth, and versatility are desired.
The ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features wide bandwidth inputs that can support a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) is provided to compensate for variations in the ADC clock duty cycle, allowing the converter to maintain excellent performance.
The ADC output data is routed directly to the external 14-bit LVDS output port.
Flexible power-down options allow significant power savings, when desired.
Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.
The AD9642 is available in a 32-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C. This product is protected by a U.S. patent.
APPLICATIONS
- Communications
- Diversity radio systems
- Multimode digital receivers (3G)
- TD-SCDMA, WiMax, WCDMA,
CDMA2000, GSM, EDGE, LTE - I/Q demodulation systems
- Smart antenna systems
- General-purpose software radios
- Ultrasound equipment
- Broadband data applications
PRODUCT HIGHLIGHTS
- Integrated 14-bit, 170 MSPS/210 MSPS/250 MSPS ADC.
- Operation from a single 1.8 V supply and a separate digital output driver supply accommodating LVDS outputs.
- Proprietary differential input maintains excellent SNR performance for input frequencies of up to 350 MHz.
- 3-pin, 1.8 V SPI port for register programming and readback.
- Pin compatibility with the AD9634, allowing a simple migration from 14 bits to 12 bits, and with the AD6672.
Documentation
Data Sheet 1
User Guide 2
Application Note 13
Technical Articles 2
Evaluation Design File 1
Tutorial 3
Circuit Note 1
Technical Book 1
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9642BCPZ-170 | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) | ||
| AD9642BCPZ-210 | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) | ||
| AD9642BCPZ-250 | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) | ||
| AD9642BCPZRL7-170 | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) | ||
| AD9642BCPZRL7-210 | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) | ||
| AD9642BCPZRL7-250 | 32-Lead LFCSP (5mm x 5mm x 0.75mm w/ EP) |
This is the most up-to-date revision of the Data Sheet.
Hardware Ecosystem
| Parts | Product Life Cycle | Description |
|---|---|---|
| Clock Distribution Devices 3 | ||
| AD9513 | RECOMMENDED FOR NEW DESIGNS | 800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
| AD9514 | RECOMMENDED FOR NEW DESIGNS | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
| AD9515 | RECOMMENDED FOR NEW DESIGNS | 1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs |
| Clock Generation Devices 6 | ||
| AD9510 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs |
| AD9511 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs |
| AD9512 | RECOMMENDED FOR NEW DESIGNS | 1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs |
| AD9523 | NOT RECOMMENDED FOR NEW DESIGNS | 14-Output, Low Jitter Clock generator |
| AD9523-1 | RECOMMENDED FOR NEW DESIGNS | Low Jitter Clock Generator with 14 LVPECL/LVDS/HSTL/29 LVCMOS Outputs |
| AD9524 | NOT RECOMMENDED FOR NEW DESIGNS | 6 Output, Dual Loop Clock Generator |
| Digital Control VGAs 2 | ||
| ADL5202 | Obsolete | Wide Dynamic Range, High Speed, Digitally Controlled VGA |
| AD8376 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion IF Dual VGA |
| Fully Differential Amplifiers 1 | ||
| ADL5562 | RECOMMENDED FOR NEW DESIGNS | 3.3 GHz Ultralow Distortion RF/IF Differential Amplifier |
| Single-Ended to Differential Amplifiers 2 | ||
| ADA4927-1 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Current Feedback Differential ADC Driver |
| ADA4938-1 | RECOMMENDED FOR NEW DESIGNS | Ultralow Distortion Differential ADC Driver (Single) |
Tools & Simulations
Virtual Eval - BETA
Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.
Open ToolS-Parameter 1
AD9642 IBIS Model 1
Visual Analog
For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.
Open ToolADIsimRF
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
Open ToolAD9642 Simulink ADIsimADC Model
Open ToolEvaluation Kits
AD9642 Evaluation Board
Resources
FPGA-Based Data Capture Kit
Resources
Software
Reference Designs
High IF Sampling Receiver Front End with Band-Pass Filter