The ADP7142 is a CMOS, low dropout (LDO) linear regulator that operates from 2.7 V to 40 V and provides up to 200 mA of output current. This high input voltage LDO is ideal for the regulation of high performance analog and mixed signal circuits operating from 40 V down to 1.2 V rails. Using an advance proprietary architecture, the device provides high power supply rejection, low noise, and achieves excellent line and load transient response with a small 2.2 μF ceramic output capacitor. The ADP7142 regulator output noise is 11 μV rms independent of the output voltage for the fixed options of 5 V or less.
The ADP7142 is available in 16 fixed output voltage options. The following voltages are available from stock: 1.2 V (adjustable), 1.8 V, 2.5 V, 3.3 V, and 5.0 V. Additional voltages available by special order are 1.5 V, 1.85 V, 2.0 V, 2.2 V, 2.75 V, 2.8 V, 2.85 V, 3.8 V, 4.2 V, and 4.6 V.
Each fixed output voltage can be adjusted above the initial set point with an external feedback divider. This allows the ADP7142 to provide an output voltage from 1.2 V to VIN − VDO with high PSRR and low noise.
User programmable soft start with an external capacitor is available in the LFCSP and SOIC packages. The ADP7142 is available in a 6-lead, 2 mm × 2 mm LFCSP making it not only a very compact solution, but it also provides excellent thermal performance for applications requiring up to 200 mA of output current in a small, low profile footprint. The ADP7142 is also available in a 5-lead TSOT and an 8-lead SOIC.
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|ADP7142: 40 V, 200 mA, Low Noise, CMOS LDO Data Sheet (Rev 0, 09/2014) (pdf, 1016 kB)||Data Sheets|
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