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AD6643:  Dual IF Receiver

Product Details

Product Status:Recommended for New Designs

The AD6643 is an 11-bit, 250MSPS, dual-channel intermediate frequency (IF) receiver specifically designed to support multiantenna systems in telecommunication applications where high dynamic range performance, low power, and small size are desired.

The device consists of two high performance analog-to-digital converters (ADCs) and noise shaping requantizer (NSR) digital blocks. Each ADC consists of a multistage, differential pipelined architecture with integrated output error correction logic. The ADC features a wide bandwidth switched-capacitor sampling network within the first stage of the differential pipeline. An integrated voltage reference eases design considerations. A duty cycle stabilizer (DCS) compensates for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.

Each ADC output is connected internally to an NSR block. The integrated NSR circuitry allows for improved SNR performance in a smaller frequency band within the Nyquist bandwidth. The device supports two different output modes selectable via the external MODE pin or the SPI.

With the NSR feature enabled, the outputs of the ADCs are processed such that the AD6643 supports enhanced SNR performance within a limited portion of the Nyquist bandwidth while maintaining an 11-bit output resolution. The NSR block can be programmed to provide a bandwidth of either 22% or 33% of the sample clock. For example, with a sample clock rate of 185 MSPS, the AD6643 can achieve up to 75.5 dBFS SNR for a 40 MHz bandwidth in the 22% mode and up to 73.7 dBFS SNR for a 60 MHz bandwidth in the 33% mode.

With the NSR block disabled, the ADC data is provided directly to the output with a resolution of 11 bits. The AD6643 can achieve up to 66.5 dBFS SNR for the entire Nyquist bandwidth when operated in this mode. This allows the AD6643 to be used in telecommunication applications such as a digital predistortion observation path where wider bandwidths are desired.

After digital signal processing, multiplexed output data is routed into two 11-bit output ports such that the maximum data rate is 500Mbps (DDR). These outputs are set at 1.8 V LVDS and support ANSI-644 levels.

The AD6643 receiver digitizes a wide spectrum of IF frequencies. Each receiver is designed for simultaneous reception of a separate antenna. This IF sampling architecture greatly reduces component cost and complexity compared with traditional analog techniques or less integrated digital methods.

Flexible power-down options allow significant power savings. Programming for device setup and control is accomplished using a 3-wire SPI-compatible serial interface with numerous modes to support board-level system testing.

APPLICATIONS
  • Communications
  • Diversity radio and smart antenna (MIMO) systems
  • Multimode digital receivers (3G)
    WCDMA, LTE, CDMA2000
    WiMAX, TD-SCDMA
  • I/Q demodulation systems
  • General-purpose software radios

PRODUCT HIGHLIGHTS

  1. Two ADCs are contained in a small, space-saving, 9 mm × 9 mm × 0.85 mm, 64-lead LFCSP package.
  2. Pin selectable noise shaping requantizer (NSR) function that allows for improved SNR within a reduced bandwidth of up to 60 MHz at 185 MSPS.
  3. LVDS digital output interface configured for low cost FPGA families.
  4. Operation from a single 1.8 V supply.
  5. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary or twos complement), NSR, power-down, test modes, and voltage reference mode.
  6. On-chip integer 1-to-8 input clock divider and multichip sync function to support a wide range of clocking schemes and multichannel subsystems.

FEATURES and BENEFITS

  • 11-bit, 250MSPS output data rate per channel
  • Performance with NSR enabled
    -- SNR: 74.5 dBFS in a 55 MHz band to 90 MHz at 250MSPS
    -- SNR: 72.0 dBFS in a 82 MHz band to 90 MHz at 250 MSPS
  • Performance with NSR disabled
    --SNR: 66.2 dBFS up to 90 MHz at 250 MSPSS
    --SFDR: 85 dBc up to 185 MHz at 250MSPS
  • Total Power consumption:
    535mW @ 200 MSPS
  • 1.8 V analog supply operation
  • 1.8 V LVDS (ANSI-644 levels) output
  • 1-to-8 integer clock divider
    (625 MHz maximum input)
  • Internal ADC voltage reference
  • See datasheet for additional features

Functional Block Diagram for AD6643

Sample Availability

This product is released to manufacturing. Please contact the High Speed Converters Development Group for sample availability and additional technical information.

Documentation

Title Content Type File Type
AD6643: Dual IF Receiver Datasheet (Rev C, 11/2012) (pdf, 1342 kB) Data Sheets PDF
AN-1142: Techniques for High Speed ADC PCB Layout  (pdf, 392 kB) Application Notes PDF
AN-878: High Speed ADC SPI Control Software  (pdf, 585 kB) Application Notes PDF
AN-282: Fundamentals of Sampled Data Systems  (pdf, 2131 kB) Application Notes PDF
AN-737: How ADIsimADC Models an ADC  (pdf, 373 kB) Application Notes PDF
AN-807: Multicarrier WCDMA Feasibility  (pdf, 969 kB) Application Notes PDF
AN-808: Multicarrier CDMA2000 Feasibility  (pdf, 1535 kB)
The goal of this application note is to determine the feasibility of implementing a multicarrier CDMA2000 transceiver and what the major subsystem performances must be.
Application Notes PDF
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs  (pdf, 203 kB) Application Notes PDF
AN-877: Interfacing to High Speed ADCs via SPI  (pdf, 1594 kB) Application Notes PDF
AN-905: VisualAnalog Converter Evaluation Tool Version 1.0 User Manual  (pdf, 2124 kB) Application Notes PDF
AN-935: Designing an ADC Transformer-Coupled Front End  (pdf, 363 kB) Application Notes PDF
AN-835: Understanding High Speed ADC Testing and Evaluation  (pdf, 985 kB) Application Notes PDF
AN-586: LVDS Outputs for High Speed A/D Converters  (pdf, 207 kB)
High Speed ADCs Uses LVDS (Low-Voltage Differential Signaling) to Minimize Performance Limitations In ADC Applications When Providing High Speed Data Output
Application Notes PDF
AN-812:  MicroController-Based Serial Port Interface (SPI) Boot Circuit (pdf, 452,449 bytes)  (pdf, 441 kB)
This application note describes the operation of a general-purpose, microcontroller-based Serial Port Interface (SPI) boot circuit.
Application Notes PDF
AN-851: A WiMax Double Downconversion IF Sampling Receiver Design  (pdf, 262 kB) Application Notes PDF
AN-742: Frequency Domain Response of Switched-Capacitor ADCs  (pdf, 401 kB) Application Notes PDF
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated  (pdf, 370 kB) Application Notes PDF
AN-345: Grounding for Low-and-High-Frequency Circuits  (pdf, 455 kB)
Know Your Ground and Signal Paths for Effective Designs. Current Flow Seeks Path of Least Impedance-Not Just Resistance....
Application Notes PDF
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter  (pdf, 291 kB) Application Notes PDF
AN-501: Aperture Uncertainty and ADC System Performance  (pdf, 227 kB)
A Key Concern in IF Sampling is that of Aperture Uncertainty (Jitter)
Application Notes PDF
AN-741: Little Known Characteristics of Phase Noise  (pdf, 1679 kB) Application Notes PDF
UG-293: Evaluating the AD9643/AD9613/AD6649/AD6643 Analog-to-Digital Converters  (pdf, 2740 kB) User Guides PDF
Glossary of EE Terms Glossary HTML

Design Tools,Models,Drivers & Software

Title Content Type File Type
ADIsimADC
ADIsimADC is Analog Devices' Analog-to-Digital Behavioral Model that accurately models the typical performance characteristics of many of our High Speed Converters. The model faithfully reproduces the errors associated with both static and dynamic features such as AC linearity, clock jitter, and many other product specific anomalies.
ADIsim Design/Simulation Tools HTML
AD6643 IBIS Model IBIS Models HTML

Evaluation Kits & Symbols & Footprints

Evaluation Boards & KitsView the Evaluation Boards and Kits page for documentation and purchasing

Symbols and Footprints— Analog Devices offers Symbols & Footprints which are compatible with a large set of today’s CAD systems for broader and easier support.

Product Recommendations & Reference Designs

Companion Products

Suggested Companion Products


Recommended Driver Amplifiers for the AD6643
  • For differential RF/IF, we recommend the ultra low distortion ADL5562.
  • For a fully differential input and output DVGA in digital communications systems, we recommend the ADL5202 or the AD8376.
Recommended Clock Drivers for the AD6643
  • For low jitter performance and integrated VCO, we recommend one of the AD9520-0 or AD9522-0 family of selectable VCO frequencies.
  • For low jitter performance along with on chip PLL and VCO, we recommend the AD9523, AD9523-1 or the AD9524.
Recommended Power Solutions

  • For selecting voltage regulator products, use ADIsimPower.

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Price, packaging, availability

AD6643 Model Options
Model Package Pins Temp.
Range
Packing,
Qty
Price*(100-499) Price*1000 pcs RoHS View PCN/ PDN Check Inventory/
Purchase/Sample
AD6643BCPZ-200 Status: Production 64 ld LFCSP (9x9mm, 6.20mm exposed pad) 64 Ind Tray, 260 $75.20 $63.92 Y  Material Info Notify Me Purchase
AD6643BCPZ-250 Status: Production 64 ld LFCSP (9x9mm, 6.20mm exposed pad) 64 Ind Tray, 260 $88.00 $74.80 Y  Material Info Notify Me Purchase
AD6643BCPZRL7-200 Status: Production 64 ld LFCSP (9x9mm, 6.20mm exposed pad) 64 Ind Reel, 750 $75.20 $63.92 Y  Material Info Notify Me Purchase
AD6643BCPZRL7-250 Status: Production 64 ld LFCSP (9x9mm, 6.20mm exposed pad) 64 Ind Reel, 750 $88.00 $74.80 Y  Material Info Notify Me Purchase
Price Table Help

The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.

AD6643 Evaluation Board
Model Description Price RoHS View PCN/ PDN Check Inventory/
Purchase/Sample
AD6643-200EBZ Status: Production Evaluation Board $300.00 Yes -

Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.

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