content here.
content here.

AD9269:  16-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter

The AD9269 is a monolithic, dual-channel, 1.8 V supply, 16-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference. The product uses multistage differential pipeline architecture with output error correction logic to provide 16-bit accuracy at 80 MSPS data rates and to guarantee no missing codes ...More

AD9269:  16-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter

Product Description

The AD9269 is a monolithic, dual-channel, 1.8 V supply, 16-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference. The product uses multistage differential pipeline architecture with output error correction logic to provide 16-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.

The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI). A quadrature error correction block is available to correct for mismatches produced by an analog demodulator (offset, gain and phase) found in direct conversion receivers. A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.

The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported and output data can be multiplexed onto a single output bus.

The AD9269 is available in a 64-lead RoHS Compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).

Applications
  • Communications
  • Diversity radio systems
  • Multimode digital receivers
    GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA
  • I/Q demodulation systems
  • Smart antenna systems
  • Battery-powered instruments
  • Hand held scope meters
  • Portable medical imaging
  • Ultrasound
  • Radar/LIDAR

RESOURCES & TOOLS

What is your task? Try Lead the Way AdvisorTM BETA
Td

TECHNICAL DOCUMENTATION

  • 1.8 V analog supply operation
  • 1.8 V to 3.3 V output supply
  • SNR
    77 dBFS at 10 MHz input
    73 dBFS at 170 MHz input
  • SFDR
    90 dBc at 10 MHz input
    78 dBc at 170 MHz input
  • Low power
    42 mW per channel at 20 MSPS
    95 mW per channel at 80 MSPS
  • Differential input with 700 MHz bandwidth
  • On-chip voltage reference and sample-and-hold circuit
  • 2Vp-p differential analog input
  • DNL = ±0.2 LSB
  • Serial port control options
    Quadrature Error correction (Gain, Offset and Phase)
  • See data sheet for additional features