Overview
Features and Benefits
- Flexible, reconfigurable common platform design
- 4 DACs and 4 ADCs (4D4A)
- Supports single, dual, and quad band
- Datapaths and DSP blocks are fully bypassable
- DAC to ADC sample rate ratios of 1, 2, 3, and 4
- On-chip PLL with multichip synchronization
- External RFCLK input option for off-chip PLL
- Maximum DAC sample rate up to 12 GSPS
- Maximum data rate up to 12 GSPS using JESD204C
- Useable analog bandwidth to 8 GHz
- Maximum ADC sample rate up to 4 GSPS
- Maximum data rate up to 4 GSPS using JESD204C
- 7.5 GHz analog input full power bandwidth (−3 dB)
- ADC ac performance at 4 GSPS, input at −2.7 GHz, −1 dBFS
- Full-scale input voltage: 1.4 V p-p
- Noise density: −147.5 dBFS/Hz
- Noise figure: 26.8 dB
- HD2: −67 dBFS
- HD3: −73 dBFS
- Worst other (excluding HD2 and HD3): −79 dBFS at 2.7 GHz
- DAC ac performance at 12 GSPS
- Full-scale output current range: 6.43 mA to 37.75 mA
- Two-tone IMD3 (−7 dBFS per tone): −78.9 dBc
- NSD, single-tone at 3.7 GHz: −155.1 dBc/Hz
- SFDR, single-tone at 3.7 GHz: −70 dBc
- SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps
- 8 lanes JESD204B/C transmitter (JTx) and 8 lanes JESD204B/C receiver Rx (JRx)
- JESD204B compliance with the maximum 15.5 Gbps
- JESD204C compliance with the maximum 24.75 Gbps
- Supports real or complex digital data (8-, 12-, 16-, or 24-bit)
- Versatile digital features
- Configurable or by-passable DDCs and DUCs
- 8 fine complex DUCs and 4 coarse complex DUCs
- 8 fine complex DDCs and 4 coarse complex DDCs
- 48-bit NCO per DUC or DDC
- Programmable 192-tap PFIR filter for receive equalization
- Supports 4 different profile settings loaded via GPIO
- Programmable delay per datapath
- Receive AGC support
- Fast detect with low latency for fast AGC control
- Signal monitor for slow AGC control
- Transmit DPD support
- Fine DUC channel gain control and delay adjust
- Coarse DDC delay adjust for DPD observation path
- Auxiliary features
- Fast frequency hopping and direct digital synthesis (DDS)
- Low latency loopback mode (receive datapath data can be routed to the transmit datapaths)
- ADC clock driver with selectable divide ratios
- Power amplifier downstream protection circuitry
- On-chip temperature monitoring unit
- Flexible GPIO pins
- TDD power savings option and sharing ADCs
- 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch
Product Details
The AD9081 mixed signal front end (MxFE®) is a highly integrated device with four 16-bit, 12 GSPS maximum sample rate, RF digital-to-analog converter (DAC) cores, and four 12-bit, 4 GSPS rate, RF analog-to-digital converter (ADC) cores. The AD9081 is well suited for applications requiring both wideband ADCs and DACs to process signal(s) that have wide instantaneous bandwidth. The device features eight transmit and eight receive lanes that support 24.75 Gbps/lane JESD204C or 15.5 Gbps/lane JESD204B standards. The device also has an on-chip clock multiplier, and a digital signal processing (DSP) capability targeted at either wideband or multiband direct to RF applications. The DSP datapaths can be bypassed to allow a direct connection between the converter cores and the JESD204 data transceiver port. The device also features low latency loopback and frequency hopping modes targeted at phase array radar system and electronic warfare applications. Two models for the AD9081 are offered. The 4D4AC model supports the full instantaneous channel bandwidth, whereas the 4D4AB model supports a maximum instantaneous bandwidth of 600 MHz per channel by automatically configuring the DSP to limit the instantaneous bandwidth at startup.
APPLICATIONS
- Wireless communications infrastructure
- Microwave point-to-point, E-band and 5G mmWave
- Broadband communications systems
- DOCSIS 3.1 and 4.0 CMTS
- Phased array radar and electronic warfare
- Electronic test and measurement systems
Product Categories
Markets and Technologies
Product Lifecycle
Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (4)
Documentation & Resources
-
Intel AN-976 (AD9081/AD9082 Tx Path JESD204C Interoperability with Agilex)2/22/2023
-
Intel AN-960 (AD9081/AD9082 Rx Path JESD204C Interoperability with Agilex)2/22/2023
-
Intel AN-949 (AD9081/AD9082 Tx Path JESD204C Interoperability with Stratix 10)7/27/2021
-
Intel AN-927 (AD9081/AD9082 Rx Path JESD204C Interoperability with Stratix 10)10/14/2020
-
Intel AN-916 (AD9081/AD9082 JESD204C Interoperability with Stratix 10)6/22/2020
-
16Tx/16Rx Phased Array Prototyping Platform "QUAD MxFE" Unboxing8/9/2023
-
Fast-Frequency Hopping Using Quad-MxFE Phased Array Platform9/6/2022
-
MxFE Evaluation Platform Demonstration Series8/1/2022SERIES
-
Analog Devices' Next Generation 5G mmW Radio from Bits-To-Beams6/3/2022
-
16 Channel Tx/Rx S-Band Phased Array RADAR Platform4/11/2022
-
"QUAD MxFE" Calibration Board Introduction & Unboxing4/11/2022
-
16Tx/16Rx L/S-Band Phased Array Radar & EW Prototyping Platform3/3/2022
-
Analog Devices MxFE® RF Data Converter Transceivers3/3/2022
-
Over-the-Air Pattern Measurements for a 32-Element Hybrid Beamforming Phased Array6/9/2023
-
Hybrid Beamforming Transmit Calibration with SFDR Optimization4/18/2023
-
Easy Digital Filter Applications for Not-So-Easy RF System Designs3/6/2023
-
High IF Sampling Puts Wideband Software-Defined Radio Within Reach5/6/2022 Analog Dialogue
-
A Measurement Summary of Distributed Direct Sampling S-Band Receivers for Phased Arrays2/10/2022
-
Considering GSPS ADCs in RF Systems11/1/2021
-
Empirically Based Multichannel Phase Noise Model Validated in a 16-Channel Demonstrator10/1/2021
-
Low Phase Noise DAC-Based Frequency Synthesis for Fast Hopping Wideband Microwave Applications7/1/2021
-
Integrated Hardened DSP on DAC/ADC ICs Improves Wideband Multichannel Systems5/1/2021
-
How Error Vector Magnitude (EVM) Measurement Improves Your System-Level Performance4/1/2021
-
SFDR Considerations in Multi-Octave Wideband Digital Receivers1/8/2021 Analog Dialogue
-
Power-Up Phase Determinism Using Multichip Synchronization Features in Integrated Wideband DACs and ADCs10/1/2020
-
System-Level LO Phase Noise Model for Phased Arrays with Distributed Phase-Locked Loops11/1/2018
Software & Systems Requirements
Device Drivers
API Device Drivers
Device Application Programming Interface (API) C code drivers provided as reference code that allows the user to quickly configure the product using high-level function calls. The library acts as an abstraction layer between the application and the hardware. The API is developed in C99 to ensure agnostic processor and operating system integration. Customers can port this application layer code to their embedded systems by integrating their platform-specific code base to the API HAL layer.
To request this software package, go to the Software Request Form signed in with your MyAnalog account and under “Target Hardware” select “High Speed Data Converters” and choose the desired API product package. You will receive an email notification once the software is provided to you.
Tools & Simulations
Software and Simulation
Thermal Models
IBIS Models
S-Parameters
Keysight ADS workbook and s-parameter files for simulating the frequency response of the AD908x DAC, ADC, and CLK interfaces. See Application note AN-2065: Optimizing RF performance of the AD9081 and AD9082” for instructions on how to use the models.
Design Tools
These command line executable tool generates a Verilog module which implements the JESD204 transmitter transport layer. The user specifies in a configuration file one or more modes to be supported by the transport layer module. These modes are defined as a set of JESD204 parameter values: L, M, F, S, N', and CF. The transport layer converts JESD204 lane data output from a JESD204 link layer IP to a data bus with a fixed width, containing interleaved virtual converter samples. Both JESD204B and JESD204C link layers are supported.
The JESD204B/C Mode Selector Tool is a simple command line-based Windows executable that can be used to narrow down the number of JESD204x modes to only include those modes that support the user’s specific application use case. The tool guides the user through a use case description flow chart and gives the user a small list of applicable transmit and/or receive modes to choose from. This tool is applicable to the AD9081, AD9082, AD9177, AD9207, AD9209, AD9986, and AD9988.
This command line executable tool generates a Verilog module which implements the JESD204 receive transport layer. The user specifies in a configuration file one or more modes to be supported by the transport layer module. These modes are defined as a set of JESD204 parameter values: L, M, F, S, N', and CF. The transport layer converts JESD204 lane data output from a JESD204 link layer IP to a data bus with a fixed width, containing interleaved virtual converter samples. Both JESD204B and JESD204C link layers are supported.
The JESD204x Frame Mapping Table Generator tool consists of two Windows executables that will allow the user to input any valid combination of JESD204x parameters (L, M, F, S, NP) in order to output a .csv file that illustrates the frame mapping of the JESD204x mode in table format. There is an executable that allows the user to input a single JESD204x mode and another, that allows the user to input the parameters for multiple JESD204x modes in a specified .csv format in order to output a .csv file that illustrates the frame mapping of each of the JESD204x modes that were input into separate tables.
ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.
Product Recommendations
AD9081 Companion Parts
Recommended Power Products
-
DC-to-DC switching regulators:
LTM4633,
LTM8053,
LTM8063,
LTM4644
LTM4644-1, LTM4616. - For a low noise linear regulators: ADP1765, ADP7158, ADM7172, ADM7150.
Recommended Clock Distribution Device
Recommended Clock Generation Device
Recommended RF Amplifiers
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.View our quality and reliability program and certifications for more information.
Part Number | Material Declaration | Reliability Data | Pin/Package Drawing | CAD Symbols, Footprints & 3D Models |
---|---|---|---|---|
AD9081BBPZ-4D4AB | Material Declaration | Reliability Data | 324-Ball BGA_ED (15mm x 15mm x 1.58mm) | |
AD9081BBPZ-4D4AC | Material Declaration | Reliability Data | 324-Ball BGA_ED (15mm x 15mm x 1.58mm) | |
AD9081BBPZRL-4D4AB | Material Declaration | Reliability Data | 324-Ball BGA_ED (15mm x 15mm x 1.58mm) | |
AD9081BBPZRL-4D4AC | Material Declaration | Reliability Data | 324-Ball BGA_ED (15mm x 15mm x 1.58mm) | |
Wafer Fabrication Data |
Support & Discussions
AD9081 Discussions
Sample & Buy
Ordering FAQs
See our Ordering FAQs for answers to questions about online orders, payment options and more.
Buy Now Pricing
(**) Displayed Buy Now Price and Price Range is based on small quantity orders.
List Pricing
(*)The 1Ku list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.
Lead Times
Please see the latest communication from our CCO regarding lead times.
Sampling
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact SampleSupport@analog.com with any questions regarding this Sample Site.
Evaluation Boards
Pricing displayed is based on 1-piece.
Up to two boards can be purchased through Analog.com. To order more than two, please purchase through one of our listed distributors.
Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.