培训、指南和研讨会

培训、指南和研讨会 — ADF4360-9 : 集成VCO的时钟发生器PLL

 
按产品分类或应用,访问 培训、指南和研讨会页面
在线研讨会 (2)
  • Fundamentals of Frequency Synthesis, Part 1: Phased Locked Loops
    The first of a two-part series on frequency synthesis, with an introduction to Phased Locked Loops. This webcast looks at the need for frequency generation, the techniques from the past present and future, and how to assess the performance of a frequency synthesis, and real world applications. Particular attention will be focused on Phase Locked Loops (PLL's) as frequency synthesizers.
  • Fundamentals of Frequency Synthesis, Part 2: Direct Digital Synthesis (DDS)
    This month we conclude our two-part series on frequency synthesis, with an introduction to Direct Digital Synthesis. We will give a basic review of how a direct digital synthesis system works, touching on the inner workings of the DDS engine at a relatively high level. We will also discuss the tradeoffs between PLL and DDS technology as a base choice for frequency synthesis needs.
沪ICP备09046653号
提供意见反馈 X
content here.
content here.

提供意见反馈

关闭