### Abstract

This article explores the challenges of designing high accuracy equipment for instrumentation applications. It will introduce a high accuracy signal chain solution built by a high linearity SAR ADC, a fully integrated ultralow drift precision reference, a quad-matched resistor network, and a zero-drift low noise amplifier. “How to Achieve 7.5 Digits Accuracy in Instrumentation Applications: Part 2” will dive further into the complete design solution as well as measurement results.

### Introduction

Many instrumentation applications require high accuracy, for example, digital multimeters (DMMs), 3-phase standard meters, calibrators for field meters, high accuracy DAQ systems, weigh scale/lab balances, seismic instrumentation, SMU/PMU in ATE, etc. These applications require the measurement of DC or low frequency AC signals with very high accuracy. In most cases, they also require high linearity, high resolution, good stability, and repeatability. Within all these applications, DMM is one of the most representative applications.

In the industry, 7.5-digit or higher digit DMM, multislope integrating ADC based on discrete components is used. Though this type of ADC can provide reasonable measurement accuracy, its design and debugging are more complicated for most customers who have to adopt commercial ADC ICs to complete the design. In the past decade or so, 24-bit sigma-delta ADCs in the market were widely implemented in 6.5-digit DMM design. Higher performance ADCs become the bottleneck to reach 7.5-digit accuracy and linearity. Another challenge comes from the reference, and the buried Zener voltage reference needs complicated external signal conditioning circuitry to reach ultra-low temperature drift.

This article will introduce a high accuracy signal chain solution built by a high linearity SAR ADC, a fully integrated ultralow drift precision reference, a quadmatched resistor network, and a zero-drift low noise amplifier. Theoretical accuracy analysis and calculations are given for reference and guidance before the real test is performed.

### Key DC Specifications of High Accuracy DMMs

Table 1 lists key DC voltage measurement specifications of typical high accuracy DMMs in the market. The key specifications include:

- Input range: Define the allowed input signal range. DMM specifications are given according to different input ranges, for example, 1000 V, 100 V, 10 V, 1 V, or 100 mV. The 10 V range is the typical range in which DMMs have the best specifications. Table 1 shows the specifications at the 10 V range. For other ranges, high accuracy resistors are used to attenuate the 1000 V or 100 V signal to 10 V range or well-matched resistor arrays are used to amplify 1 V or 100 mV signal to the 10 V range.

- Resolution or digits: Resolution is often expressed in percent, ppm, counts,or bits.
- DMM’s resolution was mostly specified in terms of the number of digits displayed. Typically, this may be a number consisting of an integer and a half, for example, 6.5 digits. The half digit can display either 0 or 1.

- A typical 6.5-digit meter could display up to 1.199999 at a 1 V measurement range. A typical 7.5-digit meter displays up to 11.999999 at a 10 V measurement range.

- For some products the resolution is often expressed in bits, like ADCs. For example, a 24-bit ADC would give 2^24 distinct values, that is, 16777216 values (counts). The digits of resolution = lg(16777216) = 7.2. Note the effective resolution of a 24-bit ADC is normally less than 24 bits, which means its effective digit is less than 7.2.

- DMM’s resolution was mostly specified in terms of the number of digits displayed. Typically, this may be a number consisting of an integer and a half, for example, 6.5 digits. The half digit can display either 0 or 1.
- Accuracy: Accuracy is the closeness of agreement between a measurement result and the true value.
- Many factors may influence accuracy, such as noise, offset error, gain error, and linearity. As it relates to an analog signal chain, each component on the chain has these errors and may contribute to the total system error or accuracy.

- The specifications may vary with temperature and time. 24-hour accuracy, 1-year accuracy, and temperature coefficient are specified as the accuracy performance with time and temperature. These parameters decide the equipment’s stability (whether the measurement value varies over time) and repeatability (whether the multiple measurement value is consistent).

- Accuracy spec in Table 1 is tested at 100 PLC reading rate (PLC is power line cycle, 100 PLC means one cycle time is 100/50 Hz, that is 2 s or 0.5 Hz) or 10 PLC (5 Hz).

- Many factors may influence accuracy, such as noise, offset error, gain error, and linearity. As it relates to an analog signal chain, each component on the chain has these errors and may contribute to the total system error or accuracy.
- Linearity: Used to specify how the input and the output of an equipment follow a straight line. It may influence the accuracy of the system.

- Noise: The system noise decides the lowest effective digits of DMM equipment. Normally this spec is tested at 100 PLC or 10 PLC.
- For below typical 7.5 DMM2, 0.1 ppm with 10 V range is 1 μV rms noise. That means, with the input terminal shorted, the lowest digit (1 μV) reading may change, which is 00.00000X.

To build a high accuracy signal chain, converters, references, precision amplifiers, and matched resistor networks on the signal chains are all contributors to the system noise and accuracy. More details will be discussed in the following sections.

6.5-Digit DMM | 7.5-Digit DMM1 | 7.5-Digit DMM2 | 8.5-Digit DMM | |

Digits | 6.5 | 7.5 | 7.5 | 8.5 |

Input Range (V) | 10 | 20 | 10 | 10 |

Resolution (ppm) | 1 | 0.1 | 0.1 | 0.01 |

24-Hour Accuracy (ppm) | 15 + 4 | 7 + 4 | 8 + 2 | 0.5 + 0.05 |

1-Year Accuracy (ppm) | 35 + 5 | 24 + 4 | 16 + 2 | 8 + 0.05 |

Linearity (ppm) | 3 | 3.5 | 1.5 | 0.1 |

Noise (ppm) | 1 | 0.1 | 0.1 | 0.01 |

TC (ppm/°C) | 5 + 1 | 5 + 1 | 0.5 + 0.01 |

### ADC

An ADC is used to convert analog signal to digital codes, which is the bridge between the analog domain and the digital domain.

Table 2 lists ADC effective resolution requirements of different DMMs at the 10 V input range. Note for most DMMs in the market, its real resolution by digits is lower than the ideal digits. For example, for 7.5-digit DMM2, its real resolution is 7.1 digits, and the ADC effective resolution needs to be at least 24.5, the noise should be <1 μV rms at 10 V input range.

6.5-Digit DMM | 7.5-Digit DMM1 | 7.5-Digit DMM2 | 8.5-Digit DMM | |

Counts | 1,200,000 | 21,000,000 | 12,000,000 | 120,000,000 |

Resolution (Digits) | 6.1 | 7.3 | 7.1 | 8.1 |

ADC Resolution | 21.2 | 25.3 | 24.5 | 27.8 |

Noise (10 V Range) | <10 μV rms | <1 μV rms | <1 μV rms | <100 nV rms |

Table 3 lists Analog Devices’ high resolution ADC’s noise specification and effective resolution.

- The AD7190 and AD7175-2 are good ADC choices for 6.5-digit applications.

- The AD7177-2 and LTC2500-32 are good ADC choices for 7.5-digit applications.

- The AD4630-24 has lower noise performance, and its ±0.1 ppm typical (±0.9 ppm maximum) linearity specification is much better than other ADCs. With low noise, high linearity, low zero, and gain drift specification, the dualchannel, simultaneous sampling, 2 MSPS SAR ADC, the AD4630-24 is a better choice for the 7.5-digit signal chain solution.

AD7190 (Gain = 1) |
AD7175-2 | AD7177-2 | LTC2500-32 | AD4630-24 | |

REF (V) | 5 | 5 | 5 | 5 | 5 |

Noise (nV rms) at 5 Hz ODR | 250 | 70 | 70 | ||

Effective Resolution (5 Hz ODR) | 24.0 | 24.0 | 27.1 | ||

Noise (nV rms) at 60 Hz ODR | 970 | 230 | 190 | 190 | 98 |

Effective Resolution (60 Hz ODR) | 23.2 | 24.0 | 25.6 | 25.6 | 26.6 |

Effective Digits (60 Hz ODR) | 6.7 | 6.9 | 7.4 | 7.4 | 7.7 |

Linearity (ppm) typ/max | 1/5.0 | 1/3.5 | 1/3.5 | 0.5/2 | 0.1/0.9 |

Other Advantage | PGIA integrated |
Flat passband filter, SINC1~SINC4, SSINC, and averaging filter | Averaging filter |

### Reference

The reference sets the system accuracy. Temperature coefficient (TC), long-term drift (LTD), noise, and initial accuracy are key specifications of reference.

LTZ1000 and LM399 are widely used in high digit DMMs for their good TC and LTD specification. There are more reference choices for high accuracy:

- The ADR1399 has lower noise and better load regulation specification than the LM399.

- The ADR1001 is a fully integrated, ultralow drift, buried Zener precision voltage reference. By integrating the entire signal conditioning circuitry required by the LTZ1000 into a single chip, the ADR1001 provides a significant reduction in overall solution area, while simplifying the design process.

- The ADR4550D output volage is 5 V with high initial accuracy. D grade has better TC and LTD specification than A/B/C grade.

All of these references are good choices for high accuracy signal chain.

Product Features | ADR1001AEZ | LTZ1000ACH | ADR1399 | ADR4550D |

Output Voltage | 6.6 V Typ. 5 V Precision Trimmed |
7.2 V Typ. at Iz = 5 mA 7.15 V Typ. at Iz = 1 mA |
7.05 V Typ. | 5 V |

Output Voltage Noise 0.1 Hz to 10 Hz | 0.6 μV p-p at 6.6 V 0.7 μV p-p at 5.0 V |
1.2 μV p-p | 1.44 μV p-p | 2.8 μV p-p |

Temperature Coefficient | <0.1 ppm/°C at ADR1000 core and <0.2 ppm/°C at buffer/resistors output |
0.05 ppm/°C | 0.2 ppm/°C (Typ.) 1 ppm/°C (Max.) |
0.8 ppm/°C (Max.) |

Initial Accuracy | ±0.05 V | +0.3 V/–0.2 V at Iz = 5 mA +0.3 V/–0.25 V at Iz = 1 mA |
0.25 V/–0.3 V | ±0.02% |

Long-Term Drift 1000 Hrs | –4 ppm at 5 V –5 ppm at 6.6 V |
2 μV√kHr | 7 ppm/√kHr | 5 ppm/√kHr |

Package | 20-lead ceramic LCC | 8-lead TO-5 metal can | TO-46 8-lead LCC | 8-lead LCC |

Temp Range | –40°C to +125°C | –55°C to +125°C | 0°C to 70°C | 0°C to 70°C |

### Amplifiers

Many op amps have some error terms at ppm levels, but none have all the errors at the ppm level. For instance, chopper amplifiers can provide ppm-level offset voltages,
DC linearity, and low frequency noise, but they have problematic input bias currents and linearity at frequency. Bipolar amplifiers can provide low wideband noise and good linearity, but their input currents can still cause in-circuit errors. MOS amplifiers have excellent bias currents but are generally deficient in the low frequency noise and linearity areas.^{1}

In practical level-shift, attenuate/gain, and active filter circuits, we have some basic op amp requirements for an amplifier supporting ±5 V signal while working in a 1 kΩ environment and achieving 1 ppm linearity shown in Table 5.

Besides the parameters listed in Table 5, offset drift and LTD are also very important. The self calibrating circuitry of the ADA4522-2 and ADA4523-1 results in low offset voltage drift with temperature (0.01 μV/°C maximum) and zero drift over time.

For applications in which signal of interest is near to switching frequency of the chopper amplifier, the ADA4510-2 can be a good candidate which most parameters are good enough to be used at any point of the signal chain.

Characteristic | Magnitude | ADA4522 | ADA4523-1 | ADA4510 |

V_{noise} |
< 6 nV/√Hz | 5.8 nV/√Hz | 4.2 nV/√Hz | 5 nV/√Hz |

V_{noise} 0.1 Hz to 10 Hz |
<1 ppm | 117 nV p-p | 88 nV p-p | 1 μV p-p |

I_{noise} |
< 6 pA/√Hz | 0.8 pA/√Hz | 1 pA/√Hz | 4 fA/√Hz |

I_{noise} 0.1 Hz to 10 Hz |
<10 nA | 2.4 pA rms | 3.2 pA rms | 12 fA rms |

V_{os} at 25°C |
<200 μV | 5 μV max | 5 μV max | 20 μV max |

V_{os} Drift Max |
<0.5 μV/°C | 22 nV/°C | 10 nV/°C | 0.5 μV/°C |

CMRR | >100 dB | 145 dB min | 140 dB min | 121 dB min |

CMRR Linearity | >120 dB | 0.01 μV/V | 0.01 μV/V | 0.3 μV/V |

I_{bias} at 25°C |
<200 nA | 150 pA max | 300 pA max | 10 pA max |

I_{bias} vs. V_{cm}
Linearity |
<1 nA to 5 nA | 2 pA/V | 2 pA/V | 0.2 pA/V |

PSRR | >90 dB | 150 dB | 140 dB | 121 dB |

GBW | >1000× signal BW | 2.7 MHz | 5 MHz | 10.4 MHz |

Linear Output Current | >15 mA | 14 mA | 20 mA | 22 mA |

### Matched Resistor Network

The matched resistor network, the LT5400 and LT5401, has very low matched TC and LTD specification, which can be used with amplifiers to configure the gain of analog front end according to the different requirements of applications. Table 6 lists ADI matched resistor network products. For the LT5400, B grade specification is listed. The LT5400 A grade has a better absolute resistor matching ratio, and its matched TC and LTD are the same as the LT5400B.

Part Number | Long Term Drift (typ) ppm |
Resistance Ohms | Resistance Ratios | Resistor Matching
Tempco (typ) ppm/°C |

LT5401 | 8 | 4 × 350, 4 × 700 | 1:2 | 200 m |

LT5400B-1 | 2 | 4 × 10 k | 1:1 | 200 m |

LT5400B-2 | 2 | 4 × 100 k | 1:1 | 200 m |

LT5400B-3 | 2 | 2 × 100 k, 2 × 10 k | 1:10 | 200 m |

LT5400B-4 | 2 | 4 × 1 k | 1:1 | 200 m |

LT5400B-5 | 2 | 4 × 1 M | 1:1 | 200 m |

LT5400B-6 | 2 | 2 × 1 k, 2 × 5 k | 1:5 | 200 m |

LT5400B-7 | 2 | 2 × 1.25 k, 2 × 5 k | 1:4 | 200 m |

LT5400B-8 | 2 | 2 × 1 k, 2 × 9 k | 1:9 | 200 m |

MAX5492 | 10 k resistor-divider | 1:1 to 10:1 | 1.5 | |

MAX5490 | 100 k resistor-divider | 1:1 to 100:1 | 1 | |

MAX5491 | 30 k resistor-divider | 1:1 to 30:1 | 2 |

### AFE Circuit (Gain Is Fixed)

Figure 1 is the AFE circuit in LTspice® that converts a ±10 V signal to a 2.5 V ± 2.5 V differential signal, which is within the allowed input range of the ADC.

- U1 and U3 are buffers that increase the input impedance of the AFE circuit.

- VCOM supply 2.5 V to bias the AFE output as a positive signal.

- The LT5400-7 (2 × 1.25k, 2 × 5k) attenuate the signal by 1/4 to allow the signal within the ADC input range.

- Amplifier is configured as in-loop compensation circuit to drive SAR ADC.

- The blue curve (±10 V input) and red curve (±5 V differential output) are the simulation result by LTspice.

The simulated 0.1 Hz to ~10 Hz noise of the AFE circuit is 32 nV rms, which is 1/3 of the 98 nV rms ADC noise.

### 24-Hour Accuracy Analysis (Ta = 23 ± 1°C)

The accuracy is contributed by two error types, offset error, and gain error. Offset error decides the uncertainty of range, and gain error decides the uncertainty of reading. The absolute errors contributed by components can be calibrated at system level, and the errors related to temperature and time are difficult to calibrate.

24-hour accuracy is mainly decided by temperature-related errors of components, and normally it is specified as ±(% of reading + % of range) or ±(ppm of reading + ppm of range).

#### Offset Error

The uncertainty contributions by offset error are signal independent. For example, assuming the input signal is 0, the final output reading may vary with the amplifier’s offset drift error. That means the amplifier’s offset drift error induces the uncertainty of range. Besides the amplifier’s offset drift, the resistor network’s TC, ADC’s zero error drift, and the ADC’s INL need to be considered and analyzed. (Note that ADC INL is treated as offset uncertainty because its nonlinearity peak value is unknown).

Figure 2 is used to simulate the error contribution by the LT5400-7:

- In theory, the AFE circuit’s output should be 0 V with 0 V input.

- Assuming the matching between R8/R9 and R1/R7 is 1 ppm, the output will be –0.5 μV, that is –0.1 ppm error.

- Assuming the matching between R13/R12 and R11/R10 is 1 ppm, the output will be –1.0 μV, that is –0.2 ppm error.

- With the LT5400-7’s ±1 ppm/°C max resistor matching ratio TC, its offset error contribution is ±0.2 ppm/°C.

Table 7 summarizes the offset errors by different sources.

- Total TC error = √0.002
^{2}+ 0.005^{2}+ 0.2^{2}+ 0.007^{2}≈ 0.2 ppm/°C.

- Considering the temperature uncertainty is ± 1°C , the total error by TC is 0.2 ppm.

- Combined with 0.9 ppm ADC INL error, total offset error = √0.2
^{2}+ 0.9^{2}≈ 1 ppm.

Error Source | Max Value | Offset Error |

ADA4523 Buffer | ±0.02 μV/°C over ±10 V | ±0.002 ppm/°C |

ADA4523 Attenuator | ±0.025 μV/°C over ±5 V | ±0.005 ppm/°C |

LT5400 Resistor Matching | 1 ppm/°C | ±0.2 ppm/°C |

AD4630 Zero Error Drift | ±0.007 ppm/°C typ | ±0.007 ppm/°C |

AD4630 INL | ±0.9 ppm | ±0.9 ppm |

### Gain Error

The uncertainty contributions by gain error are signal dependent. For example, assuming the input signal is 0, the final output reading may not vary with the reference offset drift error. That means the reference’s offset drift error induces the uncertainty of reading. Besides the reference’s offset drift, the resistor network’s TC, the ADC’s gain error drift, the reference’s hysteresis, and the amplifier’s CMRR need to be considered and analyzed.

Figure 3 is used to simulate the gain error contributed by the LT5400-7:

- In theory, the AFE circuit’s output (OUT+ - OUT-) should be –5 V with 10 V input.

- Assuming the matching between R8/R9 and R1/R7 is 1 ppm, the matching between R13/R12 and R11/R10 is 1 ppm, the output is –3.5 μV, gain error is –2.5 μV if removing –1 μV offset error.

- With the LT5400-7’s ±1 ppm/°C max resistor matching ratio TC, the gain error contribution is ±0.5 ppm/°C.

The ADA4523-1’s CMRR is 140 dB min, with ±10 V input, the buffer’s Vcm variation is ±10 V, and U4’s Vcm variation is 0 V to ~4 V, limited CMRR may induce additional gain error with input variation.

The reference’s temperature hysteresis can be omitted because the temperature variation is ± 1°C. In other applications in which operating temperature is wide, reference hysteresis error needs to be considered.

Table 8 summarizes the gain errors by different sources.

- Total TC error = √0.5
^{2}+ 0.2^{2}+ 0.07^{2}≈ 0.54 ppm/°C.

- Considering the temperature uncertainty is ± 1°C , the total error by TC is 0.54 ppm.

- Combined with amplifier CMRR error and reference temperature hysteresis error, total gain error = √0.54
^{2}+ 0.1^{2}+ 0.1^{2}≈ 0.6 ppm.

Error Source | Max Value | Gain Error |

LT5400 Resistor Matching | ±1 ppm/°C | ±0.5 ppm/°C |

ADR1001 TCVos | ±0.2 ppm/°C | ±0.2 ppm/°C |

AD4630 Gain TC | ±0.07 ppm/°C typ | ±0.07 ppm/°C typ |

ADA4523 Buffer CMRR | 140 dB CMRR | ±0.1 ppm |

ADA4523 Attenuator CMRR | 140 dB induce ±0.5 μV (0 V to 4 V Vcm) | ±0.1 ppm |

ADR1001 Hysteresis | <<1 ppm | <<1 ppm |

Based on the analysis, for the signal chain by ADA4523-1 + LT5400-7 + AD4630-24 + ADR1001, the estimated 24-hour accuracy (Ta = 23 ± 1°C) is **±(0.6 ppm + 1.0 ppm)**. From Table 7 and Table 8, the conclusion is: Amplifier’s TC, reference’s TC, resistor matching TC, and ADC INL are all important to improve the system accuracy.

### 1-Year Accuracy Analysis is (Ta = 23 ± 5°C)

For instruments, the accuracy degrades along with time. The reason is component parameters vary with time, and uncertainty increases by the square root of time. It is important to show the instrument’s accuracy with time. Normally it is specified as ±(% of reading + % of range) or ±(ppm of reading + ppm of range), the time can be 30 days, 90 days, and 1 year, and the operating ambient temperature is 23 ± 5°C.

#### Offset Error and Gain Error by Temperature

Refer to Table 7,

- Total TC error = √0.002
^{2}+ 0.005^{2}+ 0.2^{2}+ 0.007^{2}≈ 0.2 ppm/°C.

- Considering the temperature uncertainty is ± 5°C , the total error by TC is 1 ppm.

- Combined with 0.9 ppm ADC INL error, total offset error = √1
^{2}+ 0.9^{2}≈ 1.35 ppm.

Refer to Table 8,

- Total TC error = √0.5
^{2}+ 0.2^{2}+ 0.07^{2}≈ 0.54 ppm/°C.

- Considering the temperature uncertainty is ± 5°C , the total error by TC is 2.7 ppm.

- Combined with amplifier CMRR error and reference temperature hysteresis error, total gain error = √2.7
^{2}+ 0.1^{2}+ 0.1^{2}≈ 2.70 ppm.

Based on the analysis, for the signal chain by ADA4523-1 + LT5400-7 + AD4630-24 + ADR1001, the estimated accuracy (Ta = 23 ± 5°C) is ± (2.70 ppm ± 1.35 ppm).

#### Offset Error and Gain Error by Time

The LTD of different components is specified differently. Assuming the operating temperature is 28°C for one entire year, the Arrhenius equation can be used to derive the acceleration factor at 28°C. The acceleration factor:

E_{a} is activation energy, which is 0.68 eV, kB is Boltzmann constant, which is 8.62 × 10^{-5} eV/K, and Top and T_{stress} are operating temperature and test stress temperature by K.

Taking the LT5400 as an example, the data sheet shows the LTD specification of resistor matching ratio is <2 ppm for 2000 hours at 35°C, Equation 1 can be used to calculate its drift value for 1 year at 28°C. The acceleration factor:

That means drift specification for 2000 × 1.81 = 3629 hours at 28°C is <2 ppm, after 1 year (8760 hours) the LT5400 may drift √8760/3629 × 2 ppm = 3.1 ppm

The ADR1001’s LTD specification is 4 ppm for 1000 hours and 25°C, after 1 year the ADR1001 may drift 13 ppm. The ADR1399’s LTD specification is 7 ppm for 1000 hours and 25°C, after 1 year the ADR1399 may drift 23 ppm.

ADA4523-1’s mean LTD <0.03 μV.

Table 9 shows the estimated accuracy at 28°C after 1 year is ±(13.1 ppm + 0.62 ppm).

Combined with ±(2.70 ppm + 1.35 ppm) estimated accuracy (Ta = 23°C ± 5°C), the final 1 year accuracy is: ±(13.4 ppm + 1.5 ppm).

Error Source | Component Drift for 1 Year | Offset Error | Gain Error |

ADA4523 Buffer | ±0.03 μV | ±0.003 ppm | |

ADA4523 Attenuator | ±0.03 μV | ±0.006 ppm | |

LT5400 Resistor Matching | ±3.1 ppm | ±0.62 ppm | ±1.55 ppm |

ADR1001 | ±13 ppm | ±13 ppm | |

Total | ±0.62 ppm | ±13.1 ppm |

Table 10 summarizes the theoretical accuracy specifications of ADA4523-1 + LT5400-7 + AD4630-24 + ADR1001, which is similar to the specifications of typical 7.5-digit DMM in the market.

Input Range (V) | 24-Hour Accuracy (ppm) | 1-Year Accuracy (ppm) | Noise (ppm) | TC (ppm/°C) | |

ADA4523-1 + LT5400-7 + AD4630-24 + ADR1001 | 10 | 0.6 + 1 | 13.4 + 1.5 | 0.1 | 0.54 + 0.2 |

7.5-Digit DMM2 | 10 | 8 + 2 | 16 + 2 | 0.1 | 5 + 1 |

### Conclusion

By utilizing components such as the 0.1 ppm INL 2 MSPS SAR AD4630, the fully integrated ultralow drift ADR1001, the low noise zero-drift ADA4523-1, and the 1 ppm/°C LT5400, we demonstrate through theoretical analysis and calculations that this signal chain can deliver exceptional accuracy and performance. In “How to Achieve 7.5 Digits Accuracy in Instrumentation Applications: Part 2”, we will detail the complete design solution as well as the measurement results.

### References

^{1} Barry Harvey. “Can You Really Get ppm Accuracies from Op Amps?” Analog Dialogue, Vol. 53, No. 3, July 2019.