Demonstration circuit 2390A is a general-purpose test platform for prototyping and evaluating some of the key applications for the LTC2500 family of high resolution, oversampling ADCs. Assembly type A includes two LTC2500-32, 32-bit oversampling ADCs with configurable digital filters, two LTC1668 16-bit, 50Msps DACs, analog signal conditioning, and clock generation. (Other dash options are reserved for future use). All power for basic experiments is taken from the host FPGA board. The digital interface is an HSMC (high speed mezzanine connector), which is compatible with the Altera Cyclone 5 SoCkit and other Altera FPGA evaluation boards that support 3.3V CMOS I/O.

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Demonstration circuit 2222A features the LTC^®2500-32, LTC2508-32 and LTC2512-24 ADCs. The LTC2500-32, LTC2508-32 and LTC2512-24 are low power, low noise, high speed, 32-bit/24-bit SAR ADCs with an integrated configurable digital averaging filter that operate from a single 2.5V supply. The following text refers to the LTC2508-32 but applies to all parts, the only difference being sample rate and number of bits. The DC2222A demonstrates the DC and AC performance of the LTC2508-32 in conjunction with the DC590 or DC2026 QuikEval™ and DC890 PScope™ data collection boards. Use the DC590 or DC2026 to demonstrate DC performance such as peak-to-peak noise and DC linearity. Use the DC890 if precise sampling rates are required or to demonstrate AC performance such as SNR, THD, SINAD and SFDR. The DC2222A is intended to show recommended grounding, component placement and selection, routing and bypassing for this ADC.