New Content (2)
Features and Benefits
- Flexible reconfigurable common platform design
- 4 DAC cores connected to various DSP and bypass datapaths
- Supports single, dual, and quad band
- Datapaths and DSP blocks are fully bypassable
- On-chip PLL with multichip synchronization
- External RFLK input option for off-chip PLL
- Maximum DAC sample rate up to 12 GSPS
- Maximum data rate up to 12 GSPS using JESD204C
- Useable analog bandwidth to 8 GHz
- DAC ac performance at 12 GSPS
- Full-scale output current range: 6.43 mA to 37.75 mA
- Two tone IMD3 (−7 dBFS per tone): −78.9 dBc
- NSD, single tone at 3.7 GHz: −155.1 dBc/Hz
- SFDR, single tone at 3.7 GHz: −70 dBc
- Versatile digital features
- Selectable interpolation filters
- Configurable or bypassable DUCs
- 8 fine complex DUCs and 4 coarse complex DUCs
- 48-bit NCO per DUC
- Option to bypass fine and coarse DUC
- Programmable delay per datapath
- Transmit DPD support
- Fine DUC channel gain control and delay adjust
- Auxiliary features
- Direct digital synthesis and fast frequency hopping
- Low latency loopback mode (receive datapath NCO outputs can be routed to the transmit datapaths)
- Power amplifier downstream protection circuitry
- On-chip temperature monitoring unit
- Flexible GPIO pins
- TDD power savings option
- SERDES JESD204B/JESD204C interface
- 8-lane JESD204B/C receiver (JRx)
- JESD204B compliance with the maximum 15.5 Gbps
- JESD204C compliance with the maximum 24.75 Gbps
- Supports real or complex digital data (8-, 12-, 16-, or 24-bit)
- 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch
The AD9177 is a highly integrated device with four 16-bit, 12 GSPS maximum sample rate, RF digital-to-analog converter (DAC) cores supporting up to eight baseband channels. The device is well suited for applications requiring wideband DACs to process signals of wide instantaneous bandwidth. The device features an 8-lane, 24.75 Gbps JESD204C or 15.5 Gbps JESD204B data receiver (JRx) port, an on-chip clock multiplier, and digital signal processing (DSP) datapaths capable of processing complex signals for wide-band or multiband direct to RF applications, phase array radar systems, and electronic warfare applications. The DSP datapaths can be bypassed to allow a direct connection between the data receiver port and the DAC cores.
For direct digital synthesis (DDS) applications, the AD9177 can be operated without a data receiver port to generate multiple sine wave tones of varying frequencies. The main numerically controlled oscillator (NCO) block inside each of the four course digital upconverters (DUCs) contains one 48-bit NCO and a bank of thirty one 32-bit NCOs, each with an independent phase accumulator. Similarly, the main NCO block inside each of the course and fine digital downconverters (DDCs) in the receive datapath contains a bank of sixteen 48-bit NCOs that can be looped into the transmit datapath for processing ahead of the course DUCs and DAC outputs. Combined with general-purpose input/output (GPIO) controls for frequency hopping, preconfigurable profile selection, and the ability to synchronize the NCOs to a common trigger using the SYSREF input port, this bank allows phase coherent fast frequency hopping (FFH) for applications where multiple devices are synchronized or where NCO frequencies are continuously adjusted during operation.
- Wireless communications infrastructure
- Microwave point-to-point, E-band, and 5G mm wave
- Broadband communications systems
- DOCSIS 3.1 and 4.0 CMTS
- Phased array radar and electronic warfare
- Electronic test and measurement systems
Product Lifecycle Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (2)
When connected to a specified Analog Devices high speed converter evaluation board, the ADS9-V2EBZ works as a data capture/transmit board. Designed to support the highest speed JESD204B/C data converters, the FPGA on the ADS9-V2EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.
Features & Benefits
Xilinx Kintex Ultrascale+ XCKU15P-2FFVE1517E FPGA.
- One (1) FMC+ connector.
- Twenty (20) 28Gbps transceivers supported by one (1) FMC+ connector.
- HMC DRAM
- Simple USB 3.0 port interface.
- Two micro SD cards are included, "TRX" -- for ADRV9026 evaluation boards and "HSX" -- for MxFE™ evaluation boards.
The AD9081-FMCA-EBZ evaluation board includes all of the support circuitry required to operate the AD9081 in various modes and configurations. The application software used to interface with the device is also described. The AD9081-FMCA-EBZ evaluation board connects to the Analog Devices, Inc., ADS9-V2EBZ for evaluation with the ACE software. The boards can also interface to commercially available field-programmable gate array (FPGA) development boards from Xilinx® or Intel®. Information on how to use these platforms to evaluate the AD9081 or AD9082 is available in the Using the AD-FMC-SDCARD section.
The ACE software allows the user to set up the AD9081 or AD9082 in various modes, and capture analog-to-digital converter (ADC) data for analysis. The DPGDownloaderLite software generates and transmits vectors to the DACs, which can then be sent to a spectrum analyzer for further analysis. For more details, see the AD9081 and AD9082 data sheets, which must be consulted in conjunction with this user guide when using the evaluation boards.
Tools & Simulations
Software and Simulation
Compact Thermal Models
The JESD204B/C Mode Selector Tool is a simple command line-based Windows executable that can be used to narrow down the number of JESD204x modes to only include those modes that support the user’s specific application use case. The tool guides the user through a use case description flow chart and gives the user a small list of applicable transmit and/or receive modes to choose from. This tool is applicable to the AD9081, AD9082, AD9177, AD9207, AD9209, AD9986, and AD9988.
The JESD204x Frame Mapping Table Generator tool consists of two Windows executables that will allow the user to input any valid combination of JESD204x parameters (L, M, F, S, NP) in order to output a .csv file that illustrates the frame mapping of the JESD204x mode in table format. There is an executable that allows the user to input a single JESD204x mode and another, that allows the user to input the parameters for multiple JESD204x modes in a specified .csv format in order to output a .csv file that illustrates the frame mapping of each of the JESD204x modes that were input into separate tables.
AD9177 Companion Parts
Recommended Power Products
- For a low noise linear regulators: ADP1765, ADP7158, ADM7172, ADM7150.
DC-to-DC switching regulators:
Recommended Clock Distribution Device
FPGA Interoperability Reports (1)
Technical Articles (5)
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
Sample & Buy
The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.