ADRV9042

PRE-RELEASE

8T8R SoC with DFE, 400 MHz iBW RF Transceiver

Data Sheet (Rev. C) Product Selection Table
Viewing:

Part Details

  • Highly integrated transceiver
  • 8 transmit (Tx), 8 receive (Rx), and 2 observation receivers (ORx)
  • LO tuning range: 600 MHz to 7125 MHz
  • RF range: 500 MHz to 7455 MHz1
  • Zero-IF architecture reduces system size, weight, and power (SWaP)
    • Initial and run time calibrations maintain high performance
  • Dual fully integrated fractional-N RF synthesizers
  • Dual external LO inputs supporting operation up to 6 GHz.
  • Multichip phase synchronization for all local oscillator (LO) and baseband clocks
  • Single and multiband (N × 2T2R/4T4R) capability
  • 4 individual band profiles within tunable range (band profiles define bandwidth and aggregate sampling rate of a channel)
  • Fully integrated DPD supporting up to 400 MHz iBW/OBW
  • Supports up to 660 MHz instantaneous BW, 400 MHz occupied BW on RF front end with DFE enabled
  • Supports up to 400 MHz instantaneous/occupied BW with DFE disabled
  • Supports JESD204B and JESD204C digital interface
  • Simplifying thermal and power consumption challenges
  • 10.44 W power consumption for the TDD mode, full DFE features enabled use case with 100 MHz iBW/OBW2
  • 125°C maximum junction temperature for intermittent operation, 110°C for continuous (operating lifetime impact at >110°C can be offset by operation at <110°C based on acceleration factors)
  • Fully integrated DFE (DPD, CDUC, CDDC, and CFR) engine reduces FPGA resources, halves SERDES lane rate, and simplifies designs
    • DPD adaptation engine for power amplifier linearization
    • CDUC/CDDC—maximum of 8 component carriers (CCs) per each transmitter/receiver channel
    • Multistage CFR engine
  • Low power monitor and sleep modes
ADRV9042
8T8R SoC with DFE, 400 MHz iBW RF Transceiver
ADRV9042 Functional Block Diagram ADRV9042 Pin Configuration ADRV9042 Chip Illustration
Add to myAnalog

Add product to the Products section of myAnalog (to receive notifications), to an existing project or to a new project.

Create New Project
Ask a Question

Documentation

Data Sheet 1

User Guide 1

Application Note 7

Technical Articles 4

Product Highlight 1

Learn More
Add to myAnalog

Add media to the Resources section of myAnalog, to an existing project or to a new project.

Create New Project

Software Resources

API Device Drivers 1

Device Application Programming Interface (API) C code drivers provided as reference code allows the user to quickly configure the product using high-level function calls. The library acts as an abstraction layer between the application and the hardware. The API is developed in C99 to ensure agnostic processor and operating system integration. Customers can port this application layer code to their embedded systems/ Baseband Processor by integrating their platform-specific code base to the API HAL layer. To request this software package, go to the Software Request Form signed in with your MyAnalog account and under “Target Technology option - select “Wireless Communications" and choose processor/SOC as "ADRV9040 or ADRV9044" , select the check box as well and submit the form. You will receive an email notification with a link for software download.

Tools & Simulations

SDR Integrated Transceiver Design Resources

This site contains the device documentation packages for the SDR Integrated Transceivers including user guides, IBIS models, and PCB files.

Open Tool

ADIsimRF

ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.

Open Tool

Latest Discussions

No discussions on ADRV9042 yet. Have something to say?

Start a Discussion on EngineerZone®

Recently Viewed