ADRV9042

PRE-RELEASE

8T8R SoC with DFE, 400 MHz iBW RF Transceiver

Data Sheet (Rev. C) Product Selection Table

Part Models: 2
1ku List Price: price unavailable

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Overview

Highly integrated transceiver
8 transmit (Tx), 8 receive (Rx), and 2 observation receivers (ORx)
LO tuning range: 600 MHz to 7125 MHz
RF range: 500 MHz to 7455 MHz1
Zero-IF architecture reduces system size, weight, and power (SWaP)
- Initial and run time calibrations maintain high performance
Dual fully integrated fractional-N RF synthesizers
Dual external LO inputs supporting operation up to 6 GHz.
Multichip phase synchronization for all local oscillator (LO) and baseband clocks
Single and multiband (N × 2T2R/4T4R) capability
4 individual band profiles within tunable range (band profiles define bandwidth and aggregate sampling rate of a channel)
Fully integrated DPD supporting up to 400 MHz iBW/OBW
Supports up to 660 MHz instantaneous BW, 400 MHz occupied BW on RF front end with DFE enabled
Supports up to 400 MHz instantaneous/occupied BW with DFE disabled

Supports JESD204B and JESD204C digital interface
Simplifying thermal and power consumption challenges
10.44 W power consumption for the TDD mode, full DFE features enabled use case with 100 MHz iBW/OBW2
125°C maximum junction temperature for intermittent operation, 110°C for continuous (operating lifetime impact at >110°C can be offset by operation at <110°C based on acceleration factors)
Fully integrated DFE (DPD, CDUC, CDDC, and CFR) engine reduces FPGA resources, halves SERDES lane rate, and simplifies designs
- DPD adaptation engine for power amplifier linearization
- CDUC/CDDC—maximum of 8 component carriers (CCs) per each transmitter/receiver channel
- Multistage CFR engine
Low power monitor and sleep modes

The ADRV9042 is a highly integrated, RF transceiver with an integrated, digital front end (DFE) designed for use in instrumentation and aerospace, defense applications, and advanced communications systems. The transceiver contains eight transmitters, two observation receivers, eight receivers, integrated LO and clock synthesizers, and digital signal processing functions. The ADRV9042 is a high performance and low power radio with DFE support that has been designed for use in general-purpose applications operating from low frequencies. The ADRV9042 has a tuning range from 600 MHz to 7125 MHz and covers all UHF, industrial, scientific, and medical (ISM) and cellular frequency bands including WiFi 6E. Support beyond these frequencies can be enabled via external upconverters and downconverters available at Analog Devices, Inc.

Please see the Data Sheet for the full description.

APPLICATIONS

Tactical communications
Phased array radars
Electronic warfare
Wireless test and measurement
Portable instruments
Time division duplexing (TDD)
Frequency division duplexing (FDD)

Part Models: 2
1ku List Price: price unavailable

Documentation

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.

Part Model	Pin/Package Drawing	Documentation	CAD Symbols, Footprints, and 3D Models
ADRV9042BBPZ-8T1	736-Ball BGA_ED (27mm x 20 mm x 1.994 mm)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
ADRV9042BBPZRL-8T1	736-Ball BGA_ED (27mm x 20 mm x 1.994 mm)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys

This is the most up-to-date revision of the Data Sheet.

Software Resources

API Device Drivers 1

Device Application Programming Interface (API) C code drivers provided as reference code allows the user to quickly configure the product using high-level function calls. The library acts as an abstraction layer between the application and the hardware. The API is developed in C99 to ensure agnostic processor and operating system integration. Customers can port this application layer code to their embedded systems/ Baseband Processor by integrating their platform-specific code base to the API HAL layer. To request this software package, go to the Software Request Form signed in with your MyAnalog account and under “Target Technology option - select “Wireless Communications" and choose processor/SOC as "ADRV9040 or ADRV9044" , select the check box as well and submit the form. You will receive an email notification with a link for software download.

Software Request Form

Can't find the software or driver you need?

Hardware Ecosystem

Parts	Product Life Cycle	Description
Amplifier-Based Front Ends 2
ADRF5515A	RECOMMENDED FOR NEW DESIGNS	Dual-Channel, 3.3 GHz to 4.0 GHz, 20 W Receiver Front End
ADRF5515	RECOMMENDED FOR NEW DESIGNS	Dual-Channel, 3.3 GHz to 4.0 GHz, 20 W Receiver Front End
Clock ICs 2
AD9528	RECOMMENDED FOR NEW DESIGNS	JESD204B/JESD204C Clock Generator with 14 LVDS/HSTL Outputs
AD9545	RECOMMENDED FOR NEW DESIGNS	Quad Input, 10-Output, Dual DPLL/IEEE 1588, 1 pps Synchronizer and Jitter Cleaner

Low-Noise Amplifiers (LNAs) & Power Amplifiers 2
ADL5545	RECOMMENDED FOR NEW DESIGNS	30 MHz to 6 GHz RF/IF Gain Block
ADL5611	RECOMMENDED FOR NEW DESIGNS	30 MHz to 6 GHz RF/IF Gain Block
RF Switches 1
ADRF5250	RECOMMENDED FOR NEW DESIGNS	0.1 GHz to 6 GHz Silicon SP5T Switch
Switching Regulators & Controllers 2
ADP5056	RECOMMENDED FOR NEW DESIGNS	Triple Buck Regulator Integrated Power Solution
LT8627SP	RECOMMENDED FOR NEW DESIGNS	18V/16A Step-Down Silent Switcher 3 with Ultralow Noise Reference

Tools & Simulations

ADIsimRF

ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.

Open Tool

SDR Integrated Transceiver Design Resources

This site contains the device documentation packages for the SDR Integrated Transceivers including user guides, IBIS models, and PCB files.

Open Tool

Evaluation Kits

ADS10-V1EBZ Evaluation Board

Buy Now View Details

Features and Benefits

Xilinx Virtex Ultrascale+ XCVU35P-3FSHV2892E FPGA.

One (1) FMC+ connector.
Twenty (24) 32.75Gbps transceivers supported by one (1) FMC+ connector.
On-board HBM DRAM in FPGA.
Simple USB 3.0 port interface.

Product Details

When connected to a specified Analog Devices high speed converter evaluation board, the ADS10-V1EBZ works as a data capture/transmit board. Designed to support the highest speed JESD204B/C data converters, the FPGA on the ADS10-V1EBZ acts as the data receiver for high speed ADC's, and as the transmitter for high speed DAC's.

Resources

ADS10-V1EBZ User Guide
11/8/2023

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ADRV9042

Overview

Documentation

Data Sheet 1

User Guide 1

Application Note 7

Technical Articles 4

Product Highlight 1

Video 2