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Features
- Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω
- Low power, fine complex NCO allows carrier placement anywhere in DAC bandwidth while adding <300 mW power
- Auxiliary DACs allow I and Q gain matching and offset control
- Includes programmable I and Q phase compensation
- Internal digital upconversion capability
- Multiple chip synchronization interface
- High performance, low noise PLL clock multiplier
- Digital inverse sinc filter
- 100-lead, exposed pad TQFP package
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The AD9785/AD9787/AD9788 are 12-bit, 14-bit, and 16-bit, high dynamic range TxDAC® devices, respectively, that provide a sample rate of 800 MSPS, permitting multicarrier generation up to the Nyquist frequency. Features are included for optimizing direct conversion transmit applications, including complex digital modulation, as well as gain, phase, and offset compensation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators, such as the ADL5375 family from Analog Devices, Inc. A serial peripheral interface (SPI) provides for programming and readback of many internal parameters. Full-scale output current can be programmed over a range of 10 mA to 30 mA. The AD9785/AD9787/AD9788 family is manufactured on a 0.18 μm CMOS process and operates from 1.8 V and 3.3 V supplies. It is enclosed in a 100-lead TQFP package.
Product Highlights
- Low noise and intermodulation distortion (IMD) enable high quality synthesis of wideband signals from baseband to high intermediate frequencies.
- Proprietary DAC output switching technique enhances dynamic performance.
- CMOS data input interface with adjustable setup and hold.
- Low power complex 32-bit numerically controlled oscillators (NCOs).
Applications
- Wireless infrastructure
W-CDMA, CDMA2000, TD-SCDMA, WiMAX, GSM - Digital high or low IF synthesis
- Transmit diversity
- Wideband communications
LMDS/MMDS, point-to-point
Ask a Question
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Search
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Support
Analog Devices Support Portal is a one-stop shop to answer all your ADI questions.
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AD9785
Documentation
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ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
|---|---|---|---|
| AD9785BSVZ |
100-Lead TQFP (14mm x 14mm w/ EP)
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| AD9785BSVZRL |
100-Lead TQFP (14mm x 14mm w/ EP)
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- AD9785BSVZ
- Pin/Package Drawing
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100-Lead TQFP (14mm x 14mm w/ EP)
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
- AD9785BSVZRL
- Pin/Package Drawing
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100-Lead TQFP (14mm x 14mm w/ EP)
- Documentation
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
-
Ultra Librarian
-
SamacSys
Filter by Model
Part Models
Product Lifecycle
PCN
Mar 7, 2012
- 11_0074
Addition of ASE, Shanghai as an Alternative Assembly Source for Select LQFP and TQFP-EP Packages
AD9785BSVZ
PRODUCTION
AD9785BSVZRL
PRODUCTION
Jun 16, 2009
- 09_0027
Conversion to Laser Mark for the LQFP Packages (Single Grades)
AD9785BSVZ
PRODUCTION
AD9785BSVZRL
PRODUCTION
Filter by Model
Part Models
Product Lifecycle
PCN
Mar 7, 2012
- 11_0074
Addition of ASE, Shanghai as an Alternative Assembly Source for Select LQFP and TQFP-EP Packages
AD9785BSVZ
PRODUCTION
AD9785BSVZRL
PRODUCTION
Jun 16, 2009
- 09_0027
Conversion to Laser Mark for the LQFP Packages (Single Grades)
Software & Part Ecosystem
FPGA/HDL
Looking for Evaluation Software? You can find it here
| Parts | Product Life Cycle | Description | ||
|---|---|---|---|---|
|
Clock Distribution Devices3 |
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RECOMMENDED FOR NEW DESIGNS |
800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
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|
RECOMMENDED FOR NEW DESIGNS |
1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs |
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|
Clock Generation Devices3 |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs |
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RECOMMENDED FOR NEW DESIGNS |
1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs |
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|
High Voltage Op Amps ≥12V1 |
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|
PRODUCTION |
Unity-Gain Stable, Ultralow Distortion, 1 nV/√Hz Voltage Noise, High Speed Op Amp |
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I/Q Demodulators with Integrated LO1 |
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RECOMMENDED FOR NEW DESIGNS |
30 MHz TO 2200 MHz Quadrature Modulator |
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I/Q Modulators11 |
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Obsolete |
400 MHz to 1250 MHz Quadrature Modulator with 750 MHz to 1150 MHz Fractional-N PLL and Integrated VCO |
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PRODUCTION |
140 MHz to 1000 MHz Quadrature Modulator |
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PRODUCTION |
2.5 GHz Direct Conversion Quadrature Modulator |
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PRODUCTION |
300 MHz TO 1000 MHz Quadrature Modulator |
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RECOMMENDED FOR NEW DESIGNS |
500 MHz TO 1500 MHz Quadrature Modulator |
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|
PRODUCTION |
1500 MHz TO 2500 MHz Quadrature Modulator |
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PRODUCTION |
2300 MHz TO 3000 MHz Quadrature Modulator |
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Obsolete |
3000 MHz TO 4000 MHz Quadrature Modulator |
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PRODUCTION |
400 MHz TO 6 GHz Broadband Quadrature Modulator |
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PRODUCTION |
700 MHz TO 2.7 GHz Direct Up-Conversion Quadrature Modulator |
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Obsolete |
50 MHz to 2200 MHz Quadrature Modulator with Integrated Detector and VVA |
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I/Q Modulators with Integrated LO3 |
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Obsolete |
1200 MHz to 2400 MHz Quadrature Modulator with 1550 MHz to 2150 MHz Fractional-N PLL & Integrated VCO |
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Obsolete |
1550 MHz to 2650 MHz Quadrature Modulator with 2100 MHz to 2600 MHz Fractional-N PLL & Integrated VCO |
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Obsolete |
2050 MHz to 3000 MHz Quadrature Modulator with 2500 MHz to 2900 MHz Fractional-N PLL & Integrated VCO |
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Low Noise Op Amps (≤ 10nV/√Hz)1 |
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RECOMMENDED FOR NEW DESIGNS |
1 nV/√Hz, Low Power, Rail-to-Rail Output Amplifiers |
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Precision Op Amps (Vos ≤1mV & TCVos ≤2uV/C)1 |
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PRODUCTION |
Low Noise, High Speed Amplifier for 16-Bit Systems |
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Can't find the software or driver you need?
Request a Driver/SoftwareEvaluation Kits 2
SDP-H1
High Speed Controller Board
Features and Benefits
- Xilinx® Spartan 6
- 1 x FMC Low Pin Count ( LPC) connector
- LVDS and single ended LVCMOS signaling
- DDR2
- JTAG header
- Blackfin processor ADSP-BF527
- 1 x small Footprint 120 pin connector
- Configurable Peripheral Interfaces SPI, SPORT, I2C, GPIO, Asynchronous Parallel, PPI, Timers
- USB 2.0 interface to the PC
Product Detail
The SDP-H1 is a high speed controller board for the System Demonstration Platform (SDP). The SDP-H1 has a Xilinx® Spartan 6 and an ADSP-BF527 processor with connectivity to the PC through a USB 2.0 high speed port. Controller boards allow for the configuration and capture of data on daughter boards from the PC via USB.
The SDP-H1 has a FMC low pin count ( LPC) connector with full differential LVDS and singled ended LVCMOS support. It also has the 120 pin connector, found on the SDP-B which exposes the Blackfin processors peripherals. This connector provides a configurable Serial, Parallel I2C and SPI and GPIO communications lines to the attached daughter board. The PC side software application for controlling the attached daughter board is provided with each of the daughter product evaluation boards or Circuits from the Lab reference Circuits.
The System Demonstration Platform is a collection of controller boards, interposer boards, and daughter boards, used for easy, low cost evaluation of ADI components and reference circuits. For a general overview of the entire platform visit the System Demonstration Platform homepage www.analog.com/sdp
See the full list of compatible Product Evaluation Boards and Circuits from the Lab Reference Circuit Boards that require the SDP-B. All SDP-S compatible daughter boards can be used with the SDP-B.
Resources
EVAL-AD9785
AD9785 Evaluation Board
Product Detail
Resources
Tools & Simulations 1
IBIS Model 1
IBIS Model
