AD9650

RECOMMENDED FOR NEW DESIGNS

16-Bit, 25 MSPS/65 MSPS/80 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)

Data Sheet (Rev. A) Product Selection Table

Part Models: 10
1ku List Price: Starting From $68.05

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Overview

1.8 V analog supply operation
1.8 V CMOS or LVDS output supply
SNR

82 dBFS at 30 MHz input and 105 MSPS data rate
83 dBFS at 9.7 MHz input and 25 MSPS data rate

SFDR

90 dBc at 30 MHz input and 105 MSPS data rate

95 dBc at 9.7 MHz input and 25 MSPS data rate
Low power

328 mW per channel at 105 MSPS
119 mW per channel at 25 MSPS

Integer 1-to-8 input clock divider
See data sheet for additional features

AD9650-EP supports defense and aerospace applications (AQEC standard)

Download AD9650-EP data sheet (pdf)

The AD9650 is a dual, 16-bit, 25 MSPS/65 MSPS/80 MSPS/ 105 MSPS analog-to-digital converter (ADC) designed for digitizing high frequency, wide dynamic range signals with input frequencies of up to 300 MHz.

The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth, differential sample-and-hold analog input amplifiers, and shared integrated voltage reference, which eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.

The ADC output data can be routed directly to the two external 16-bit output ports or multiplexed on a single 16-bit bus. These outputs can be set to either 1.8 V CMOS or LVDS.

Flexible power-down options allow significant power savings, when desired.

Programming for setup and control is accomplished using a 3-wire SPI-compatible serial interface.

The AD9650 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.

PRODUCT HIGHLIGHTS

On-chip dither option for improved SFDR performance with low power analog input.
Proprietary differential input that maintains excellent SNR performance for input frequencies up to 300 MHz.
Operation from a single 1.8 V supply and a separate digital output driver supply accommodating 1.8 V CMOS or LVDS outputs.
Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, and test modes.
Pin compatible with the AD9268 and other dual families, AD9269, AD9251, AD9231, and AD9204. This allows a simple migration across resolutions and bandwidth.

APPLICATIONS

Industrial instrumentation
X-Ray, MRI, and ultrasound equipment
High speed pulse acquisition
Chemical and spectrum analysis
Direct conversion receivers
Multimode digital receivers
Smart antenna systems
General-purpose software radios

Part Models: 10
1ku List Price: Starting From $68.05

Documentation

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.

Part Model	Pin/Package Drawing	Documentation	CAD Symbols, Footprints, and 3D Models
AD9650BCPZ-105	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9650BCPZ-25	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9650BCPZ-65	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9650BCPZ-80	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9650BCPZRL7-105	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9650BCPZRL7-25	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9650BCPZRL7-65	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9650BCPZRL7-80	64-Lead LFCSP (9mm x 9mm w/ EP)	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9650USVZ-105EP	TQFP 1.0 MM W/ THERMAL PAD	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys
AD9650USVZR7-105EP	TQFP 1.0 MM W/ THERMAL PAD	Material Declaration Reliablity Data Package Resources	Ultra Librarian SamacSys

Part Models	Product Lifecycle	PCN

Jun 9, 2021 - 20_0126 Conversion of Select Sizes LFCSP Products from Punched to Sawn and Transfer of Assembly Site to ASE Korea
		PCN20_0126_Form Qualification Results Summary Material_Report Detailed Change Description Package Outline Drawing Package Outline Drawing Qualification Results Summary Qualification Results Summary Qualification Results Summary Qualification Results Summary
AD9650BCPZ-105	PRODUCTION
AD9650BCPZ-25	PRODUCTION
AD9650BCPZ-65	PRODUCTION
AD9650BCPZ-80	PRODUCTION
AD9650BCPZRL7-105	PRODUCTION
AD9650BCPZRL7-25	PRODUCTION
AD9650BCPZRL7-65	PRODUCTION
AD9650BCPZRL7-80	PRODUCTION
Dec 23, 2015 - 14_0247 Assembly Transfer of Selected 12x12 TQFP_EP Pre-Plated Frame (PPF) Products to Amkor Philippines
		PCN14_0247_Form Material_Report Qualification Results Summary Detailed Parts List
AD9650USVZ-105EP	PRODUCTION
AD9650USVZR7-105EP	PRODUCTION

This is the most up-to-date revision of the Data Sheet.

Software Resources

Can't find the software or driver you need?

Request a Driver/Software

Hardware Ecosystem

Parts	Product Life Cycle	Description
Clock ICs 6
AD9510	RECOMMENDED FOR NEW DESIGNS	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Eight Outputs
AD9511	RECOMMENDED FOR NEW DESIGNS	1.2 GHz Clock Distribution IC, PLL Core, Dividers, Delay Adjust, Five Outputs
AD9512	RECOMMENDED FOR NEW DESIGNS	1.2 GHz Clock Distribution IC, Two 1.6 GHz Inputs, Dividers, Delay Adjust, Five Outputs
AD9513	RECOMMENDED FOR NEW DESIGNS	800 MHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs

AD9514	RECOMMENDED FOR NEW DESIGNS	1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Three Outputs
AD9515	RECOMMENDED FOR NEW DESIGNS	1.6 GHz Clock Distribution IC, Dividers, Delay Adjust, Two Outputs
Differential Amplifiers 4
ADA4937-2	RECOMMENDED FOR NEW DESIGNS	Ultralow Distortion Differential ADC Driver (Dual)
ADA4938-2	RECOMMENDED FOR NEW DESIGNS	Ultralow Distortion Differential ADC Driver (Dual)
ADL5561	RECOMMENDED FOR NEW DESIGNS	2.9 GHz Ultralow Distortion RF/IF Differential Amplifier
ADL5562	RECOMMENDED FOR NEW DESIGNS	3.3 GHz Ultralow Distortion RF/IF Differential Amplifier
Variable Gain Amplifiers (VGA) 2
AD8376	RECOMMENDED FOR NEW DESIGNS	Ultralow Distortion IF Dual VGA
AD8372	RECOMMENDED FOR NEW DESIGNS	41 dB Range, 1 dB Step Size, Programmable Dual VGA

Tools & Simulations

Virtual Eval - BETA

Virtual Eval is a web application to assist designers in product evaluation of ADCs, DACs, and other ADI products. Using detailed models on Analog’s servers, Virtual Eval simulates crucial part performance characteristics within seconds. Configure operating conditions such as input tones and external jitter, as well as device features like gain or digital down-conversion. Performance characteristics include noise, distortion, and resolution, FFTs, timing diagrams, response plots, and more.

Open Tool

IBIS Model 1

AD9650 IBIS Model

S-Parameter 1

AD9650 S-Parameter

Visual Analog

For designers who are selecting or evaluating high speed ADCs, VisualAnalog™ is a software package that combines a powerful set of simulation and data analysis tools with a user-friendly graphical interface.

Open Tool

AD9650 Simulink ADIsimADC Model

Open Tool

Evaluation Kits

FPGA-Based Data Capture Kit

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Features and Benefits

64kB FIFO Depth
Works with single and multi-channel ADCs
Use with VisualAnalog^® software
Based on Virtex-4 FPGA
May require adaptor to interface with some ADC eval boards
Allows programming of SPI control Up to 644 MSPS SDR / 800MSPS DDR Encode Rates on each channel
DDR Encode Rates on each channel

Product Details

The HSC-ADC-EVALCZ high speed converter evaluation platform uses an FPGA based buffer memory board to capture blocks of digital data from the Analog Devices high speed analog-to-digital converter (ADC) evaluation boards. The board is connected to the PC through a USB port and is used with VisualAnalog^® to quickly evaluate the performance of high speed ADCs. The evaluation kit is easy to set up. Additional equipment needed includes an Analog Devices high speed ADC evaluation board, a signal source, and a clock source. Once the kit is connected and powered, the evaluation is enabled instantly on the PC.

Resources

High Speed ADC USB FPGA Evaluation Kit, EVALC
1/1/0001

Software

EVALC PC Board Gerber File

Microsoft .NET Framework 3.5

High Speed ADC SPI Control Software
29.79 M

AD9650 Evaluation Board

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Features and Benefits

Full featured evaluation board for the AD9650
SPI interface for setup and control
External, on-board oscillator, or AD9517 clocking options
Balun/transformer or amplifier input drive options
LDO regulator or switching power supply options
VisualAnalog^® and SPI controller software interfaces

Product Details

This page contains evaluation board documentation and ordering information for evaluating the AD9650.

The AD9650-105EBZ is an evaluation board for the AD9650, dual 16-bit ADC. This reference design provides all of the support circuitry to operate devices in their various modes and configurations. It is designed to interface directly with the HSC-ADC-EVALCZ data capture card, allowing users to download captured data for analysis. The Visual Analog software package, which is used to interface with the device's hardware, allows users to download captured data for analysis with a user-friendly graphical interface. The SPI controller software package is also compatible with this hardware and allows the user to access the SPI programmable features of the AD9650.

The AD9650 data sheet provides additional information related to device configuration and performance and should be consulted when using these tools. All documents and Visual Analog and SPI Controller are available at the High Speed ADC Evaluation Boards page. For additional information or questions, please email highspeed.converters@analog.com.