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Features
- High performance
- Throughput: 40 MSPS, 46.25 ns conversion latency
- INL: ±4 ppm (typical), ±8 ppm (maximum)
- SNR/THD
- 93.6 dB (typical)/−110 dB (typical) at fIN = 1 kHz
- 93.5 dB (typical)/−104 dB (typical) at fIN = 1 MHz
- Noise spectral density: −167.6 dBFS/Hz
- 20-bit resolution, no missing codes
- Low power
- 79.3 mW typical at 40 MSPS with −0.5 dBFS sine-wave input
- Easy Drive, fully differential Input
- 6 V p-p differential input range
- Continuous signal acquisition
- Linearized, 5 μA/MSPS input current
- Integrated, low-drift reference buffer and decoupling
- Integrated VCM generation
- Digital features and data interface
- Conversion result FIFO, 16K sample depth
- Digital averaging filter with up to 210 decimation
- SPI configuration
- Configurable data interface
- Single lane, DDR, serial LVDS, 800 MBPS per lane
- Dual lane, DDR, serial LVDS, 400 MBPS per lane
- Single/quad lane SPI data interface
- Package
- 49-ball, 5 mm x 5 mm CSP_BGA, 0.65 mm pitch
- Integrated supply decoupling capacitors
- Operating temperature range: −40°C to +85°C
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The AD4080 is a high-speed, low noise, low distortion, 20-bit, Easy Drive, successive approximation register (SAR) analog-to-digital converter (ADC). Maintaining high performance (signal-to-noise and distortion (SINAD) ratio > 90 dBFS) at signal frequencies in excess of 1 MHz enables the AD4080 to service a wide variety of precision, wide bandwidth data acquisition applications. Simplification of the input anti-alias filter design can be accomplished by applying oversampling along with the integrated digital filtering and decimation to reduce noise and lower the output data rate for applications that do not require the lowest latency of the AD4080.
The AD4080 Easy Drive features reduce both signal chain complexity and power consumption while enabling greater channel density and flexibility in companion component selection. The product input structure was designed to minimize any input dependent signal currents; therefore, reducing any converter induced settling artifacts. The continuous acquisition architecture allows settling across the entire conversion cycle, easing ADC driver settling and bandwidth requirements as compared to other high-speed data converters.
The AD4080 includes several elements that simplify data converter integration: a low drift reference buffer, low dropout (LDO) regulators to generate ADC core and digital interface supply rails, and a 16K result data first-in first out (FIFO) that can greatly reduce the load on the digital host. Additionally, critical supply and reference decoupling capacitors are integrated in the package to ensure optimum performance, simplify printed circuit board (PCB) layout, and reduce the overall solution footprint.
APPLICATIONS
- Digital imaging
- Cell analysis
- Spectroscopy
- Automated test equipment
- High speed data acquisition
- Digital control loops, hardware in the loop
- Power quality analysis
- Source measurement units
- Electron and x-ray microscopy
- Radar level measurement
- Nondestructive test
- Predictive maintenance and structural health
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AD4080
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ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal. View our quality and reliability program and certifications for more information.
| Part Model | Pin/Package Drawing | Documentation | CAD Symbols, Footprints, and 3D Models |
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| AD4080BBCZ | CHIP SCALE BGA |
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| AD4080BBCZ-RL | CHIP SCALE BGA |
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| AD4080BBCZ-RL7 | CHIP SCALE BGA |
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- AD4080BBCZ
- Pin/Package Drawing
- CHIP SCALE BGA
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Material Declaration
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HTML
Reliablity Data
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SamacSys
- AD4080BBCZ-RL
- Pin/Package Drawing
- CHIP SCALE BGA
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD Symbols, Footprints, and 3D Models
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Ultra Librarian
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SamacSys
- AD4080BBCZ-RL7
- Pin/Package Drawing
- CHIP SCALE BGA
- Documentation
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HTML
Material Declaration
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HTML
Reliablity Data
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Software & Part Ecosystem
Device Drivers
Looking for Evaluation Software? You can find it here
| Parts | Product Life Cycle | Description | ||
|---|---|---|---|---|
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Clock Distribution Devices1 |
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RECOMMENDED FOR NEW DESIGNS |
1.65 GHz Clock Fanout Buffer with Output Dividers and Delay Adjust |
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Fully Differential Amplifiers1 |
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RECOMMENDED FOR NEW DESIGNS |
High Speed, ±0.1 µV/˚C Offset Drift, Fully Differential ADC Driver |
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High Voltage Op Amps ≥12V1 |
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PRODUCTION |
Unity-Gain Stable, Ultralow Distortion, 1 nV/√Hz Voltage Noise, High Speed Op Amp |
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Integer-N PLL1 |
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PRODUCTION |
Wideband Synthesizer with Integrated VCO |
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Micropower Buck Regulators1 |
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High Efficiency 42V/120mA Synchronous Bucks |
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Positive Linear Regulators (LDO)4 |
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RECOMMENDED FOR NEW DESIGNS |
20V, 500mA, Ultralow Noise, Ultrahigh PSRR Linear Regulator |
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PRODUCTION |
Ultralow Noise, 150 mA CMOS Linear Regulator |
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RECOMMENDED FOR NEW DESIGNS |
11µVRMS Low-Noise, 500mA LDO Linear Regulators with Low-Power Mode |
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RECOMMENDED FOR NEW DESIGNS |
20V, 500mA, Ultralow Noise, Ultrahigh PSRR Linear Regulator with VIOC Control |
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Series Voltage References2 |
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PRODUCTION |
0.25ppm Noise, Low Drift Precision References |
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RECOMMENDED FOR NEW DESIGNS |
Ultra-Low-Noise, High-Accuracy 3.0V Voltage Reference |
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Single-Ended to Differential Amplifiers1 |
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RECOMMENDED FOR NEW DESIGNS |
Ultralow Noise Drivers for Low Voltage ADCs |
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Can't find the software or driver you need?
Request a Driver/SoftwareEvaluation Kits 1
EVAL-AD4080-FMC
Features and Benefits
- Full featured evaluation board for the AD4080
- Analysis | Control | Evaluation (ACE) Software plug-in available for device configuration, data capture, and performance evaluation
- Flexible analog front end
- On-board power solution and precision reference
- On-board clock generation circuitry with sampling frequency control via the ACE Software
- FMC compatible
Product Detail
The EVAL-AD4080-FMCZ is designed to demonstrate the AD4080 performance and provide access to a limited set of AD4080 features in the ACE Software environment. The EVAL-AD4080-FMCZ evaluation kit supports the following AD4080 features:
- Low voltage digital signaling (LVDS) data output interface
- Analog-to-digital converter (ADC) configuration via serial peripheral interface (SPI)
- Internal or external generation of 1.1 V regulated supply rails
- Sampling rate capability between 1.25 MSPS and 40 MSPS
The EVAL-AD4080-FMCZ evaluation board was designed for use with the Digilent ZedBoard via the field programmable gate array (FPGA) mezzanine card (FMC) connector. The ZedBoard uses a Xilinx Zynq7000 system on chip (SoC) that runs Analog Devices, Inc., Kuiper Linux and LIBIIO included on the SD card supplied in the evaluation board kit to facilitate communication with the EVAL-AD4080-FMCZ, enabling ADC configuration and data capture. The ZedBoard also provides the communication link to the host PC and the ACE Software plug-in.
Resources
Software
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Evaluation Kits1
Tools & Simulations 2
LTspice® is a powerful, fast and free simulation software, schematic capture and waveform viewer with enhancements and models for improving the simulation of analog circuits.
To launch ready-to-run LTspice demonstration circuits for this part:
Step 1: Download and install LTspice on your computer.
Step 2: Click on the link in the section below to download a demonstration circuit.
Step 3: If LTspice does not automatically open after clicking the link below, you can instead run the simulation by right clicking on the link and selecting “Save Target As.” After saving the file to your computer, start LTspice and open the demonstration circuit by selecting ‘Open’ from the ‘File’ menu.
Lt Spice
IBIS Model 1
