AD9627:  12-Bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter

The AD9627 is a dual, 12-bit, 80 MSPS/105 MSPS/125 MSPS/ 150 MSPS analog-to-digital converter (ADC). The AD9627 is designed to support communications applications where low cost, small size and ...More

To drive this ADC in DC-coupled applications, we suggest ADA4937-1 or ADA4938-1. To drive this ADC in AC-coupled applications, we suggest AD8352. To drive this ADC with an IF VGA, we suggest AD8376 or AD8372.

AD9627:  12-Bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter

Product Description

The AD9627 is a dual, 12-bit, 80 MSPS/105 MSPS/125 MSPS/ 150 MSPS analog-to-digital converter (ADC). The AD9627 is designed to support communications applications where low cost, small size and versatility are desired.

The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.

The AD9627 has several functions that simplify the automatic gain control (AGC) function in the system receiver. The fast detect feature allows fast overrange detection by outputting four bits of input level information with very short latency.

In addition, the programmable threshold detector allows monitoring of the incoming signal power, using the four fast detect bits of the ADC with very low latency. If the input signal level exceeds the programmable threshold, the coarse upper threshold indicator goes high. Because this threshold indicator has very low latency, the user can quickly turn down the system gain to avoid an overrange condition.

The second AGC-related function is the signal monitor. This block allows the user to monitor the composite magnitude of the incoming signal, which aids in setting the gain to optimize the dynamic range of the overall system.

The ADC output data can be routed directly to the two external 12-bit output ports. These outputs can be set from 1.8 V to 3.3 V CMOS or 1.8 V LVDS. Flexible power-down options allow significant power savings, when desired.

Programming for setup and control is accomplished using a 3-bit SPI-compatible serial interface.

The AD9627 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.

Product Highlights

  1. Integrated dual, 12-bit, 80 MSPS/105 MSPS/125 MSPS/ 150 MSPS ADC.
  2. Fast overrange detect and signal monitor with serial output.
  3. Signal monitor block with dedicated serial output mode.
  4. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 450 MHz.
  5. Operation from a single 1.8 V supply and a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.
  6. Standard serial port interface (SPI) that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, test modes, and voltage reference mode.
  7. 7. Pin compatibility with the AD9640, AD9627-11, and AD9600 for a simple migration from 12 bits to 14 bits, 11 bits, or 10 bits.

Applications

  • Communications
  • Diversity radio systems
  • Multimode digital receivers (3G)
    GSM, EDGE, WCDMA,
    CDMA2000, WiMAX, TD-SCDMA
  • I/Q demodulation systems
  • Smart antenna systems
  • General-purpose software radios
  • Broadband data applications
  • Data Sheet, Rev. 0, 10/07

    Features

    • SNR = 69.4 dBc (70.4 dBFS) to 70 MHz @
      125 MSPS
    • SFDR = 85 dBc to 70 MHz @ 125 MSPS
    • Low power: 750 mW @ 125 MSPS
    • SNR = 69.2 dBc (70.2 dBFS) to 70 MHz @
      150 MSPS
    • SFDR = 84 dBc to 70 MHz @ 150 MSPS
    • Low power: 820 mW @ 150 MSPS
    • 1.8 V analog supply operation
    • 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS output supply
    • Integer 1-to-8 input clock divider
    • IF sampling frequencies to 450 MHz
    • Internal ADC voltage reference
    • Integrated ADC sample-and-hold inputs

    Diagrams

    AD9627 Diagram
    Functional Block Diagram for AD9627

    Specifications

    Resolution (Bits) 12bit
    T-Put Rate 150MSPS
    # Chan 2
    Supply V Single(+1.8)
    Pwr Diss (max) 890mW
    Interface Par
    Ain Range (2Vref) p-p,1 V p-p,2 V p-p
    SNR (dB) 69.7dB
    Pkg Type CSP

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    Part# Res Throughput Rate # of Inputs Operating Pwr Diss
    AD9627-150 12 150MSPS 2 890mW
    AD9230-170 12 170MSPS 1 407mW
    AD9626-170 12 170MSPS 1 291mW
    AD9626-250 12 250MSPS 1 390mW
    AD9230-250 12 250MSPS 1 463mW
    AD9600-150 10 150MSPS 2 890mW
    AD9627-80 12 80MSPS 2 490mW
    AD9238-65 12 65MSPS 2 698mW
    AD9238-20 12 20MSPS 2 212mW
    AD7922 12 1MSPS 2 15mW
    AD7366-5 12 500KSPS 2 54.5mW
    Pricing, Packaging & Availability

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    • Military : -55 to +125 degrees Celsius
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    • Automotive: -40 to +125 degrees Celsius
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    The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.

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