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特性
- Integrated RF front end
- LNA and high-power silicon SPDT switch
- On-chip bias and matching
- Single-supply operation
- Gain: 35.5 dB typical at 2.6 GHz
- Gain flatness: 0.2 dB at 25°C across 400 MHz bandwidth
- Low noise figure: 1.2 dB typical at 2.6 GHz
- Low insertion loss: 0.7 dB typical at 2.6 GHz
- High-power handling at TCASE = 105°C
- Full lifetime
- LTE average power (8 dB PAR): 36.5 dBm
- Single event (<10 sec operation)
- LTE average power (8 dB PAR): 39 dBm
- High Input IP3: −4 dBm
- Low-supply current
- Receive operation: 118 mA typical at 5 V
- Transmit operation: 15 mA typical at 5 V
- Positive logic control
- 5 mm × 3 mm, 24-lead LFCSP package
- Pin compatible with the ADRF5534, 3.1 GHz to 4.2 GHz receiver front end
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The ADRF5532 is an integrated RF, front-end multichip module designed for time division duplex (TDD) applications. The device operates from 2.3 GHz to 2.7 GHz. The ADRF5532 is configured with a low-noise amplifier (LNA) and a high-power, silicon, single pole double throw (SPDT) switch.
In the receive operation at 2.6 GHz, the LNA offers a low noise figure (NF) of 1.2 dB and a high gain of 35.5 dB with a third order input intercept point (IIP3) of −4 dBm.
In the transmit operation, the switch provides a low insertion loss of 0.7 dB and handles a long-term evolution (LTE) average power of 36.5 dBm for a full lifetime operation (8 dB peak to average ratio (PAR)) and 39 dBm for a single event (<10 sec) LNA protection operation.
The device is featured in an RoHS compliant, compact, 5 mm × 3 mm, 24-lead LFCSP package.
APPLICATIONS
- Wireless infrastructure
- TDD massive multiple input and multiple output (MIMO) and active antenna systems
- TDD-based communication systems
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ADRF5532
文档
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产品技术资料帮助
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参考资料
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| 产品型号 | 引脚/封装图-中文版 | 文档 | CAD 符号，脚注和 3D模型 |
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| ADRF5532BCPZN |
24-lead LFCSP (5 mm x 3 mm x 0.95 mm)
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| ADRF5532BCPZN-R7 |
24-lead LFCSP (5 mm x 3 mm x 0.95 mm)
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| ADRF5532BCPZN-RL |
24-lead LFCSP (5 mm x 3 mm x 0.95 mm)
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- ADRF5532BCPZN
- 引脚/封装图-中文版
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24-lead LFCSP (5 mm x 3 mm x 0.95 mm)
- 文档
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HTML
Material Declaration
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HTML
Reliablity Data
- CAD 符号，脚注和 3D模型
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Ultra Librarian
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SamacSys
- ADRF5532BCPZN-R7
- 引脚/封装图-中文版
-
24-lead LFCSP (5 mm x 3 mm x 0.95 mm)
- 文档
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD 符号，脚注和 3D模型
-
Ultra Librarian
-
SamacSys
- ADRF5532BCPZN-RL
- 引脚/封装图-中文版
-
24-lead LFCSP (5 mm x 3 mm x 0.95 mm)
- 文档
-
HTML
Material Declaration
-
HTML
Reliablity Data
- CAD 符号，脚注和 3D模型
-
Ultra Librarian
-
SamacSys
软件和型号相关生态系统
评估套件 1
EVAL-ADRF5532
Evaluating the ADRF5532, 2.3 GHz to 2.7 GHz, Receiver Front End
特性和优点
- Full featured evaluation board for the ADRF5532
- Easy connection to test equipment
- Thru line for calibration
产品详情
The ADRF5532 is an integrated RF, front-end multichip module designed for time division duplex (TDD) applications. The device operates from 2.3 GHz to 2.7 GHz. The ADRF5532 is configured with a low-noise amplifier (LNA) and a high-power, silicon, single pole double throw (SPDT) switch.
This user guide describes the ADRF5532-EVALZ, designed to easily evaluate the features and performance of the ADRF5532. Figure 1 shows a photograph of the ADRF5532-EVALZ.
Note that the ADRF5532 IC is populated on the ADRF5534 bare evaluation board. However, the whole assembly is the ADRF5532- EVALZ
Full details about the device are available in the ADRF5532 data sheet. Consult it when using the ADRF5532-EVALZ.
资料
工具及仿真模型 1
S-参数 1
S-参数