概览

优势和特点

  • Easy Drive
    • Greatly reduced input kickback
      • Input current reduced to 0.5 μA/MSPS
    • Enhanced acquisition phase, ≥88% of cycle time at 500 kSPS 
    • First conversion accurate, no latency or pipeline delay
    • Input span compression for single-supply operation
    • Fast conversion allows low SPI clock rates
    • Input overvoltage clamp protection sinks up to 50 mA
    • SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface
  • High performance
    • Differential analog input range: ±VREF, VREF from 2.4 V to 5.1 V
    • Throughput: 500 kSPS options 
    • INL: ±3.1 ppm maximum
    • Guaranteed 20-bit no missing codes
    • SNR: 100.5 dB at fIN = 1 kHz at VREF = 5 V
    • THD: −123 dB at fIN = 1 kHz, −100 dB at fIN = 100 kHz
    • SINAD: 92 dB at fIN = 250 kHz (see Figure 17)
  • Oversampled dynamic range
    • 104 dB for OSR = 2
    • 131 dB for OSR = 1024
  • Low power
  • Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface
    • 2.7 mW at 500 kSPS (VDD only)
    • 83 μW at 10 kSPS, 4.5 mW at 500 kSPS (total power)
  • 10-lead packages: 3 mm × 3 mm LFCSP, 3 mm × 4.90 mm MSOP
  • Guaranteed operation: −40°C to +125°C

产品详情

The AD4022 is a high accuracy, high speed, low power, 20-bit, Easy Drive, precision successive approximation register (SAR) analog-to-digital converter (ADC) that operates from a single power supply, VDD. The reference voltage, VREF, is applied externally and can be set independent of the supply voltage. The AD4022 power scales linearly with throughput.

Easy Drive features reduce both signal chain complexity and power consumption while enabling higher channel density. The reduced input current, particularly in high-Z mode, coupled with a long signal acquisition phase, eliminates the need for a dedicated ADC driver. Easy Drive broadens the range of companion circuitry that is capable of driving these ADCs (see Figure 2).

Input span compression eliminates the need to provide a negative supply to the ADC driver amplifier while preserving access to the full ADC code range. The input overvoltage clamp protects the ADC inputs against overvoltage events, minimizing disturbances on the reference pin, and eliminating the need for external protection diodes. 

Fast device throughput up to 500 kSPS allows users to accurately capture high frequency signals and to implement oversampling techniques to alleviate the challenges associated with antialias filter designs. Decreased serial peripheral interface (SPI) clock rate requirements reduce digital input/output power consumption, broadens digital host options, and simplifies the task of sending data across digital isolation. The SPI-compatible serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V logic by using the separate VIO logic supply.

Applications

  • Automatic test equipment
  • Machine automation
  • Medical equipment
  • Battery-powered equipment
  • Precision data acquisition systems
  • Instrumentation and control systems

产品生命周期 icon-recommended 推荐新设计使用

本产品已上市。数据手册包含所有最终性能规格和工作条件。ADI公司推荐新设计使用这些产品。

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软件代码及系统需求

工具及仿真模型

IBIS模型

AD4000 Series IBIS Models

设计工具

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使用精密ADC驱动器工具仿真精密ADC和驱动器组合的性能。

配套产品推荐

AD4022 配套产品

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