Overview

Features and Benefits

  • RF 2 × 2 transceiver with integrated 12-bit DACs and ADCs
  • TX band: 47 MHz to 6.0 GHz
  • RX band: 70 MHz to 6.0 GHz
  • Supports TDD and FDD operation
  • Tunable channel bandwidth: <200 kHz to 56 MHz
  • Dual receivers: 6 differential or 12 single-ended inputs
  • Superior receiver sensitivity with a noise figure of 2 dB at 800 MHz LO
  • RX gain control
    • Real-time monitor and control signals for manual gain
    • Independent automatic gain control
  • Dual transmitters: 4 differential outputs
  • Highly linear broadband transmitter
    • TX EVM: ≤−40 dB
    • TX noise: ≤−157 dBm/Hz noise floor
    • TX monitor: ≥66 dB dynamic range with 1 dB accuracy
  • Integrated fractional-N synthesizers
  • 2.4 Hz maximum local oscillator (LO) step size
  • Multichip synchronization
  • CMOS/LVDS digital interface

Product Details

The AD9361 is a high performance, highly integrated radio frequency (RF) Agile Transceiver™ designed for use in 3G and 4G base station applications. Its programmability and wideband capability make it ideal for a broad range of transceiver applications. The device combines a RF front end with a flexible mixed-signal baseband section and integrated frequency synthesizers, simplifying design-in by providing a configurable digital interface to a processor. The AD9361 receiver LO operates from 70 MHz to 6.0 GHz and the transmitter LO operates from 47 MHz to 6.0 GHz range, covering most licensed and unlicensed bands. Channel bandwidths from less than 200 kHz to 56 MHz are supported.

The two independent direct conversion receivers have state-of-the-art noise figure and linearity. Each receive (RX) subsystem includes independent automatic gain control (AGC), dc offset correction, quadrature correction, and digital filtering, thereby eliminating the need for these functions in the digital baseband. The AD9361 also has flexible manual gain modes that can be externally controlled. Two high dynamic range analog-to-digital converters (ADCs) per channel digitize the received I and Q signals and pass them through configurable decimation filters and 128-tap finite impulse response (FIR) filters to produce a 12-bit output signal at the appropriate sample rate.

The transmitters use a direct conversion architecture that achieves high modulation accuracy with ultralow noise. This transmitter design produces a best in class TX error vector magnitude (EVM) of <−40 dB, allowing significant system margin for the external power amplifier (PA) selection. The on-board transmit (TX) power monitor can be used as a power detector, enabling highly accurate TX power measurements.

The fully integrated phase-locked loops (PLLs) provide low power fractional-N frequency synthesis for all receive and transmit channels. Channel isolation, demanded by frequency division duplex (FDD) systems, is integrated into the design. All VCO and loop filter components are integrated. The core of the AD9361 can be powered directly from a 1.3 V regulator. The IC is controlled via a standard 4-wire serial port and four real-time input/output control pins. Comprehensive power-down modes are included to minimize power consumption during normal use. The AD9361 is packaged in a 10 mm × 10 mm, 144-ball chip scale package ball grid array (CSP_BGA).

Applications

  • Point to point communication systems
  • Femtocell/picocell/microcell base stations
  • General-purpose radio systems

Product Lifecycle icon-recommended Production

At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.

Evaluation Kits (2)

Software & Systems Requirements

Tools & Simulations

Product Recommendations

AD9361 Companion Parts

Recommended Voltage Regulators

  • For a high efficiency, step down, dc-to-dc regulator: ADP2164.
  • For high performance LDO regulators: ADP1755, ADP5040.

Recommended Clock Driver

  • For a Quad/Octal network clock driver: AD9548.

Recommended Low Noise Amplifiers (LNA's)

Recommended PLL's

  • For a versatile, wideband PLL with integrated VCO: ADF4351.

Recommended RF Driver Amplifiers

Recommended RF/IF Gain Block Amplifier

  • For a broadband 20dB linear amplifier: ADL5602.

Reference Materials

Solutions Bulletins & Brochures (1)

Design Resources

ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well.  "Zero defects" for shipped products is always our goal.

Discussions

AD9361 Discussions

AD9361 internal schematic diagram
5 week(s) ago in Design Support AD9361/AD9363/AD9364
AD9361 initialization using register writes
7 week(s) ago in Design Support AD9361/AD9363/AD9364
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The USA list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. sales office or authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.


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Evaluation Boards Pricing displayed is based on 1-piece.
Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.