AD9548
RECOMMENDED FOR NEW DESIGNSQuad/Octal Input Network Clock Generator/Synchronizer
Part Details
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The AD9548 provides synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9548 generates an output clock synchronized to one of up to four differential or eight single-ended external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The AD9548 continuously generates a clean (low jitter), valid output clock even when all references have failed by means of a digitally controlled loop and holdover circuitry.
The AD9548 operates over an industrial temperature range of −40°C to +85°C.
Applications
- Network synchronization
- Cleanup of reference clock jitter
- GPS 1 pulse per second synchronization
- SONET/SDH clocks up to OC-192, including FEC
- Stratum 2 holdover, jitter cleanup, and phase transient control
- Stratum 3E and Stratum 3 reference clocks
- Wireless base stations, controllers
- Cable infrastructure
- Data communications
Documentation
Data Sheet 1
User Guide 1
Application Note 4
Technical Articles 1
Frequently Asked Question 1
Video 4
Device Drivers 1
Product Selection Guide 1
Webcast 1
This is the most up-to-date revision of the Data Sheet.
Software Resources
Device Drivers 1
Evaluation Software 3
JESD204 Interface Framework
Integrated JESD204 software framework for rapid system-level development and optimization
AD9547/AD9548 Evaluation Board USB Flash Programmer Readme
readme-ad9547-ad9548-evaluation-board-usb-flash-programmer