AD9548
Quad/Octal Input Network Clock Generator/Synchronizer
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Overview
Features and Benefits
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Product Details
The AD9548 provides synchronization for many systems, including synchronous optical networks (SONET/SDH). The AD9548 generates an output clock synchronized to one of up to four differential or eight single-ended external input references. The digital PLL allows for reduction of input time jitter or phase noise associated with the external references. The AD9548 continuously generates a clean (low jitter), valid output clock even when all references have failed by means of a digitally controlled loop and holdover circuitry.The AD9548 operates over an industrial temperature range of −40°C to +85°C.
Applications
- Network synchronization
- Cleanup of reference clock jitter
- GPS 1 pulse per second synchronization
- SONET/SDH clocks up to OC-192, including FEC
- Stratum 2 holdover, jitter cleanup, and phase transient control
- Stratum 3E and Stratum 3 reference clocks
- Wireless base stations, controllers
- Cable infrastructure
- Data communications
Product Categories
Product Lifecycle
Recommended for New Designs
This product has been released to the market. The data sheet contains all final specifications and operating conditions. For new designs, ADI recommends utilization of these products.
Evaluation Kits (2)
Documentation & Resources
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AN-1079: Determining the Maximum Tolerable Frequency Drift Rate of the AD9548 System Clock in Low Loop Bandwidth Applications (Rev. A)9/10/2010
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AN-1061: Behavior of the AD9548 Phase and Frequency Lock Detectors in the Presence of Random Jitter (Rev. 0)4/19/2010
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AN-1064: Understanding the Input Reference Monitors of the AD9548 (Rev. 0)4/19/2010
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AN-1002: The AD9548 as a GPS Disciplined Stratum 2 Clock (Rev. 0)7/9/2009
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FAQs7/26/2017
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AD9547 / AD9548: Evaluation Board Setup11/28/2018 -
AD9548: GPS Clock Synchronization11/28/2018 -
AD9547 / AD9548: Profile Designer Software11/28/2018 -
AD9547 / AD9548: Evaluation Board Software Overview11/28/2018
Software & Systems Requirements
Evaluation Software
JESD204 Interface Framework
Integrated JESD204 software framework for rapid system-level development and optimization
TXT
1.71 K
AD9547/AD9548 Evaluation Board USB Flash Programmer Readme
readme-ad9547-ad9548-evaluation-board-usb-flash-programmer
Tools & Simulations
Support & Discussions
AD9548 Discussions
RE: How to use AD9548 generate 1pps
6 day(s) ago in Clock and Timing
RE: AD9547 Clock Configuration File
1 week(s) ago in Clock and Timing
Evaluation Boards
Pricing displayed is based on 1-piece.
Up to two boards can be purchased through Analog.com. To order more than two, please purchase through one of our listed distributors.
Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.