CN0382

Analog Front-End Interface

The AD7124-4 is a low power, low noise, completely integrated analog front end for high precision measurement applications. The device contains a low noise, 24-bit, Σ-Δ analog-to-digital converter (ADC), and can be configured to have four differential inputs or seven single-ended or pseudo differential inputs. The on-chip low noise gain stage ensures that signals of small amplitude can be interfaced directly to the ADC.

One of the major advantages of the AD7124-4 is that it gives the user the flexibility to employ one of three integrated power modes. The current consumption, range of output data rates, and rms noise can be tailored with the power mode selected. The device also offers a multitude of filter options, ensuring that the user has the highest degree of flexibility.

The AD7124-4 can achieve simultaneous 50 Hz and 60 Hz rejection when operating at an output data rate of 25 SPS (single-cycle settling).

The AD7124-4 establishes the highest degree of signal chain integration. The device contains a precision, low noise, low drift internal band gap reference, and also accepts an external differential reference, which can be internally buffered. Other key integrated features include programmable low drift excitation current sources, burnout currents, and a bias voltage generator, which sets the common-mode voltage of a channel to AV_DD/2. The low-side power switch enables the user to power down bridge sensors between conversions, ensuring the absolute minimal power consumption of the system. The device also allows the user the option of operating with either an internal clock or an external clock.

The integrated channel sequencer allows several channels to be enabled simultaneously, and the AD7124-4 sequentially converts on each enabled channel, simplifying communication with the device. As many as 16 channels can be enabled at any time; a channel being defined as an analog input or a diagnostic such as a power supply check or a reference check. This unique feature allows diagnostics to be interleaved with conversions. The AD7124-4 also supports per channel configuration. The device allows eight configurations or setups. Each configuration consists of gain, filter type, output data rate, buffering, and reference source. The user can assign any of these setups on a channel by channel basis.

The AD7124-4 also has extensive diagnostic functionality integrated as part of its comprehensive feature set. These diagnostics include a cyclic redundancy check (CRC), signal chain checks, and serial interface checks, which lead to a more robust solution. These diagnostics reduce the need for external components to implement diagnostics, resulting in reduced board space needs, reduced design cycle times, and cost savings. The failure modes effects and diagnostic analysis (FMEDA) of a typical application has shown a safe failure fraction (SFF) greater than 90% according to IEC 61508.

Sensor Input

The circuit supports 3-wire and 4-wire RTDs, thermocouples, and pressure transducers via the 8-pin connector. The AD7124-4 has all the building blocks needed to interface to these sensors. For all the sensor types connected, the ADC is used in mid power mode. The post filter is used because it enables simultaneous 50 Hz and 60 Hz rejection when converting at 25 SPS. When a sensor is connected to the circuit, the ADC is configured to suit the sensor type connected. An internal full-scale and offset calibration can also be performed to minimize the offset error and full-scale error, the calibrations being initiated by a UART or HART command.

The AD7124-4 has numerous diagnostics on-chip, which ensure a robust design. In this circuit, open-wire detection ensures that the sensors are connected, the power-on reset (POR) in the status register is monitored so that the user is informed when a power-on reset occurs. The error register is read for each conversion, and its contents are sent via HART along with the sensor result.

RTD

A resistive temperature detector (RTD) can measure temperature from −200°C to +600°C. Typical RTDs are Pt100 and Pt1000 and are made of platinum. A Pt100 is used with this circuit.

4-Wire RTD

Figure 2 shows how a 4-wire Pt100 RTD connects to the circuit.

One of the on-chip excitation currents of the AD7124-4 excites the Pt100. The maximum resistance of the Pt100 is 313.71 Ω (at 600°C). If the excitation current is programmed to 250 μA, the maximum voltage generated across the Pt100 is

With the programmable gain array (PGA) programmed to a gain of 16, the maximum voltage seen at the modulator input is

A 5.6 kΩ precision resistor (0.05%, 10 ppm/°C) generates the reference voltage. The value of the reference resistor, R_REF, is chosen so that the voltage generated across it has a minimum value of 1.25 V in this circuit, that is, the voltage seen at the modulator input due to the analog input is less than or equal to the reference voltage. The 250 μA current that supplies the Pt100 also flows through the 5.6 kΩ resistor, resulting in a ratiometric configuration. Therefore, any variation of the excitation current has no effect on the performance of the circuit. The voltage generated across the precision resistor is

Antialiasing filters are included on the analog input and reference input. These filters prevent any interference at multiples of the modulator sampling frequency aliasing into the band of interest. To ensure that these filters and the external resistors do not cause gain errors, the reference buffers are enabled. The analog input buffers are enabled automatically because these buffers are enabled when the PGA is used. The reference buffers require some headroom (100 mV within the power supply rails). Therefore, a 470 Ω resistor was included on the low side to allow this headroom.

The 250 μA excitation current requires 370 mV of headroom. The voltage seen on this pin is (470 + 5600 + 313.71) Ω × 250 μA = 1.6 V, which is acceptable.

The AIN4 and AIN5 pins are used as the AINP and AINM analog input.

The 1 kΩ resistors on the connector pins have a dual purpose: they make up the antialias filters, and they also protect the analog inputs if an overvoltage occurs (due to miswiring, for example).

The Circuit Note CN-0383 provides further detail on interfacing 4-wire Pt100 sensors to the AD7124-4 and linearizing or post-processing the conversions.

The circuit shown in Figure 1 also supports a 4-wire Pt1000 RTD. The circuit connections are the same as those used for the Pt100. The ADC configuration used is described previously in this section, but with the PGA gain set to 1.

3-Wire RTD

Figure 3 shows how a 3-wire Pt100 RTD connects to the circuit.

The AD7124-4 has two matched excitation currents. Both are used with the 3-wire RTD so that lead wire compensation can be performed. Because the Pt100 has a maximum resistance is 313.71 Ω (at 600 °C), the excitation currents are programmed to 250 μA. The reference resistor, R_REF, is connected on the top side. Therefore, one 250 μA excitation current (IOUT0) is output on Pin AIN6, flows through the 5.6 kΩ precision reference resistor (0.05%, 10ppm/°C), and then through the Pt100. The second 250 μA current (IOUT1) is output on pin AIN7. This current generates a voltage due to the lead resistance, which is in opposition to the lead resistance voltage generated due to the current on AIN6. Therefore, the error due to the lead resistance is minimized.

The voltage generated across the 5.6 Ωk reference resistor is

The maximum voltage generated across the Pt100 is

With the PGA programmed to a gain of 16, the voltage seen at the modulator of the AD7124-4 is

This voltage is within range because it is less than the reference voltage.

Antialiasing filters are included on the analog input and reference input. These filters prevent any interference at multiples of the modulator sampling frequency from aliasing into the band of interest. To ensure that these filters and the external resistors do not cause gain errors, the reference buffers are enabled. The analog input buffers are enabled automatically because these buffers are enabled when the PGA is used. The reference buffers require some headroom (100 mV within the power supply rails). Therefore, a 470 Ω resistor was included on the low side to allow this headroom.

The 250 μA excitation current requires 370 mV of headroom. The voltage seen on this pin is (470 Ω × 2 × 250 μA) + (5600 + 313.71) Ω × 250 μA = 1.713 V, which is acceptable.

The Circuit Note CN-0383 provides further detail on interfacing 3-wire Pt100 sensors to the AD7124-4 and linearizing or post-processing the conversions.

The circuit shown in Figure 1 also supports a 3-wire Pt1000 RTD. The circuit connections are the same as used for the Pt100. The ADC configuration used is as described previously in this section, but with the PGA gain set to 1.

Thermocouple

Figure 4 shows how a thermocouple connects to the circuit.

A thermocouple consists of a connection of two different types of wire. A voltage is generated, which is dependent on temperature. For example, a T-type thermocouple generates a voltage of 40 μV typically when a 1°C change in temperature occurs.

The thermocouple voltage must be biased to a voltage. The AD7124-4 contains a V_BIAS source that biases the thermocouple to (AV_DD − AV_SS)/2. The bias voltage is enabled on the AIN6 channel and applied to the thermocouple, as shown in Figure 4. The bias voltage can also be enabled on the AINM pin of the analog input. However, the external R and C values must be limited in this case, because there is a difference between the bias voltage seen on AINM and the filtered version seen on AINP; this difference is sufficiently high that it affects the conversion result.

The thermocouple measurement is an absolute measurement, the internal 2.5 V reference being used for the conversion. A T-type thermocouple is used. This thermocouple can measure temperatures from −200°C to +400°C, leading to a voltage range of −8 mV to +16 mV being generated by the thermocouple. The PGA is set to 128.

For the cold junction compensation, an NTC thermistor is used (10 kΩ, 1%, 3435 K).

The internal reference supplies the thermistor, the gain being set to 1 for this conversion. A resistor, R_REF, is used on the low side of the thermistor. This is a precision 5.6 kΩ resistor (0.05%, 10 ppm/°C). The voltage across the thermistor V_NTC is

where:

V_REF is the reference voltage.
ADC_CODE is the code read from the AD7124-4.
2²⁴ is the maximum code from ADC.

The resistance of the thermistor, R_NTC, is

where:

R_REF = 5.6 kΩ.
V_REF is the reference voltage.

Combining these equations,

where:

ADC_CODE is the code read from the AD7124-4.
R_REF = 5.6 kΩ.
FS_CODE is the full-scale code from the AD7124-4 (224).

The resistance is then converted to temperature in the microcontroller using a look-up table based on the thermistor equation:

where:

T is the temperature recorded by thermistor (K).
R₀ = 10 kΩ.
β = 3435 K.
T₀ = 298.15 K.

The resulting temperature in °C is T − 273.15.

The 5.6 kΩ resistor also provides headroom for the analog input because the analog input buffers are enabled, and they require 100 mV of headroom. This resistor also protects the circuit because it limits the current if miswiring occurs.

The Circuit Note CN-0384 provides further detail on interfacing thermocouple sensors to the AD7124-4 and linearizing or post-processing the conversions.

Pressure Sensor

A voltage excited pressure sensor is connected as shown in Figure 6 while a current-excited pressure sensor is connected as shown in Figure 7. A Honeywell pressure sensor (Honeywell S&C 24PCDFA6D) is used.

For the voltage excited architecture, AV_DD (3.3 V) excites the sensor. If AV_DD is used to excite the load cell, the excitation voltage can be used directly as the ADC reference. Note that a resistor was added on the high side and the low side of the sensor to ensure that the headroom requirements of the AD7124-4 buffers are met. A gain of 16 is used.

For the current excited mode, both of the 100 μA excitation currents of the AD7124-4 are directed to Pin AIN6, resulting in a 200 μA excitation current for the sensor. Again, the gain is set to 16. A 5.6 kΩ precision resistor generates the reference. This arrangement results in a ratiometric configuration, that is, any deviation in the excitation current value has no effect on the system accuracy.

The circuit board includes the option to connect the sensor low side to GND or to the power switch of the AD7124-4.

As previously stated, the analog inputs and reference inputs have antialias filters to reject any interference that occur at multiples of the ADC sampling frequencies. The series resistors also limit the current if an overvoltage occurs.

Primary Sensor Simulation

The circuit includes a resistor network and potentiometer that allows sensor simulation (primary sensor simulation circuit shown in Figure 1). Using the potentiometer, the voltage applied between AIN0 (AINP) and AIN1 (AINM) can be varied from approximately −0.09 V to approximately +1.36 V. This circuit uses the internal reference for the conversions; the AD7124-4 gain is set to 1, and the analog input buffers are enabled. This configuration allows the user to evaluate the circuit without needing to connect an external sensor.

Digital Data Processing, Algorithm, and Communications

The demonstration software (included in the CN-0382 Design Support Package) performs the initialization and configuration, processes data from the analog inputs, controls the analog output, and performs the HART communication. All the sensors mentioned require linearization or compensation. This linearization is performed in the software. See Circuit Note CN-0383, and Circuit Note CN-0384 for further details on the RTD and thermocouple sensors and the linearization required.

Analog Output

The AD5421 integrates a low power, precision, 16-bit DAC with a 4 mA to 20 mA, loop powered output driver and provides all functions required for the field instrument analog output.

The AD5421 interfaces with the microcontroller via the SPI interface.

The AD5421 also includes a range of diagnostic functions related to the 4 mA to 20 mA loop. The auxiliary ADC can measure the voltage across the instruments loop terminals via the 20 MΩ/1 MΩ resistive divider connected to the VLOOP pin. The ADC can also measure the chip temperature via the integrated sensor. The microcontroller can configure and read all the diagnostics of the AD5421; however, the AD5421 can also operate autonomously.

As an example, if the communication between the controller and the AD5421 fails, the AD5421 automatically sets its analog output to a 3.2 mA alarm current after a defined period. This alarm current indicates to the host that the field instrument failed to operate.

The software controls any change of the output current from one value to another to prevent disturbance of the HART communication.

HART Communication

The AD5700 integrates a complete HART FSK modem. The modem connects to the microcontroller via a standard UART interface, complemented by request to send (RTS) and carrier detect (CD) signals.

The HART output is scaled to the required amplitude by the 0.068 μF/0.22 μF capacitive divider and coupled to the AD5421 CIN pin, where it is combined with the DAC output to drive and modulate the output current.

The HART input is coupled from LOOP+ via a simple passive RC filter to the AD5700 ADC_IP pin. The RC filter operates as the first stage band-pass filter for the HART demodulator and also improves the system electromagnetic immunity, which is important for robust applications working in harsh industrial environments.

The AD5700 low power oscillator generates the clock for the HART modem with a 3.6864 MHz external crystal connected directly to the XTAL1 and XTAL2 pins.

Output Protection

A transient voltage suppressor (TVS) protects the 4 mA to 20 mA HART interface from overvoltage. Select the TVS voltage rating so that the AD5421 absolute maximum voltage of 60 V on the REGIN pin is not exceeded. Note that the TVS leakage current can affect the current output accuracy; therefore, pay attention to the leakage current at a given loop voltage and temperature range when selecting this component.

An external depletion-mode FET can be used with the AD5421 to increase the loop voltage maximum.

The circuit is protected against reversed polarity by a pair of diodes in series with loop output.

The ferrite beads in series with the loop together with the 4700 pF capacitor improve the system EMC performance. Do not use a higher capacitance across the loop terminals because of the HART network specifications.

The 4.7 V, low leakage, Zener diode protects the AD5421 on-chip, 50 Ω loop sense resistor in the event of an accidental external voltage between the AD5421 COM pin and LOOP− pin (for example, when debugging the circuit).

Power Supplies and Power Management

The complete field instrument circuitry, including the sensor drive current, must operate on the limited amount of power available from the 4 mA to 20 mA loop. This is a common challenge in any loop powered field instrument design. The circuit in Figure 1 provides an example of delivering both a low power and high performance solution. All integrated circuits used in the application are designed for low power, and the circuit leverages their integrated features to deliver a flexible power management structure and an optimum loop powered solution.

The AD5421 is powered by the 4 mA to 20 mA loop voltage and provides a regulated low voltage for the rest of the circuit. The AD5421 REG_OUT voltage is pin programmable from 1.8 V to 12 V depending on circuit requirements. The circuit in Figure 1 uses the 9 V supply voltage option. The sensor side is isolated from the 4-20 mA loop using a simple push-pull, dc-to-dc converter. The ADG5433 is clocked from the microcontroller and generates 9 V non-overlapping square waves, which drive a transformer. The transformer works in voltage ratio 2:1. The 4.5 V on the secondary side is rectified and regulated by the ADP162 to generate a low noise 3.3 V supply for the AD7124-4. Both the analog and digital 3.3 V supplies of the AD7124-4 are supplied by the ADP162 regulator. However, a filter (L1/R19) is included to prevent noise from the digital circuitry being fed into the analog sections.

The AD5421 supplies the 3.3 V logic supply on the loop side. This supply is used directly by the microcontroller and the AD5700.

The REG_OUT RC filter (10 μF/10 Ω/10 μF) helps to prevent any interference coming from the loop affecting the analog circuitry. It also prevents any interference generated by the circuit, specifically by the controller and the digital circuitry, from coupling back to the loop, which is important for a reliable HART communication.

The AD5700 HART modem is supplied through an additional RC filter (470 Ω/1 μF). This filter is very important in the loop powered application because it prevents current noise from the AD5700 from coupling to the 4 mA to 20 mA loop output, which would otherwise affect the HART communication. The AD5700 modem uses the external crystal with 8.2 pF capacitors to ground on the XTAL1 and XTAL2 pins, which is the option using the least possible power.

One of the major advantages of the AD7124-4 is that it gives the user the flexibility to employ one of three integrated power modes.< The current consumption, range of output data rates, and rms noise can be tailored with the power mode selected. Therefore, for 4 mA to 20 mA or portable equipment, the low or mid power mode is the optimum choice. For process control systems where power consumption is not a concern, the full power mode can be used, which leads to lower noise. For this loop powered circuit, the mid power mode is used. See the AD7124-4 data sheet for further information on the power modes.

The PSW ground switch pin of the AD7124-4 controls the excitation/power supply when the pressure transducer is connected. The switch is off by default at the instrument power up. This default allows the system to be fully configured, including appropriate power modes, before turning on the sensor, and thus minimizes any possible power-up spikes on the 4 mA to 20 mA loop output.

When an RTD sensor is connected, it is supplied from the programmable current source of the AD7124-4, and therefore, its power is fully controlled by the software. Similarly, for thermocouple sensors, the bias voltage and absolute reference are embedded in the AD7124-4 and therefore software controlled.

Software

The microcontroller interfaces to the AD7124-4 and AD5421 using SPI interfaces. It communicates with the AD5700 via a UART interface, UART0. Software is downloaded to the microcontroller via the second UART interface on the microcontroller, UART1.

On start-up, the microcontroller configures all three devices, the AD7124-4 being configured for a T-type thermocouple. The AD7124-4 is operated in continuous conversion mode. Therefore, its DOUT/RDY pin is connected to an interrupt on the microcontroller also. Each time a conversion is available from the ADC, an interrupt to the microcontroller is generated and the conversion is read. The microcontroller then linearizes and processes the data. The result is sent to the AD5421 DAC for transmission on the 4 mA to 20 mA loop. The software used to demonstrate the functionality and performance of the circuit is contained in the CN-0382 Design Support Package. The software supports all the sensor types mentioned in this circuit note. Documentation on how to alter the software for the different sensor types and details on downloading the software to the microcontroller are also provided in the CN-0382 Design Support Package.

The code example includes a basic HART slave command response to demonstrate the hardware function and capability. However, the code example does not include the protocol layers of the HART communication.