-
ADSP-BF531/ADSP-BF532/ADSP-BF533: Blackfin Embedded Processor Data Sheet (Rev. I)10/2/2006PDF3415 kB
Overview
Features and Benefits
- Performance to 400MHz/800MMACs enables multi-channel audio plus CIF video processing in multimedia applications
- Enhanced Dynamic Power Management with on-chip core voltage regulation allows operation to 0.8V extending battery life in portable applications
- Application-tuned peripherals provide glueless connectivity to general purpose converters in data acquisition applications
- Multiple low cost, pin- and code-compatible derivatives enable software differentiation in cost-sensitive consumer applications
Product Details
Analog Devices initial product family, the ADSP-BF531, ADSP-BF532, and ADSP-BF533, offer all the ease of use and architectural attributes of the Blackfin processor. These three processors are all completely pin compatible - differing solely with respect to their performance and on-chip memory - thus reducing risk and offering the ability to scale up or down depending upon the end application needs. All three processors offer low power consumption with scalable performance from low-cost to very high performance.
The ADSP-BF531 is the low cost entry point into the Blackfin Processor family. It offers an optimal balance between performance, peripheral integration, and price and is well suited for the most cost-sensitive applications including portable test equipment, embedded modems, biometrics, and consumer audio.
HIGH LEVEL OF INTEGRATION
- 52Kbytes of on-chip L1 memory configured as:
- 32Kbytes of L1 instruction memory SRAM/Cache
- 16Kbytes of L1 data memory SRAM/Cache
- 4 Kbytes of L1 scratchpad SRAM
- Parallel Peripheral Interface supporting ITU-R 656 video data formats
- Two dual-channel, full-duplex synchronous serial ports supporting eight stereo I2S channels
- 12 DMA channels supporting one and two-dimensional data transfers
- Memory controller providing glueless connection to multiple banks of external SDRAM, SRAM, Flash, or ROM.
- Three timer/counters supporting PWM, pulsewidth, and event count modes
- UART with support for IrDA®
- SPI-compatible port
- Event handler
- Real-time clock
- Watchdog timer
- PLL capable of 1× to 63× frequency multiplication
- 160-ball (12mm × 12mm) Mini-BGA, 176-Lead (24mm × 24mm) LQFP, and 169-ball (19mm × 19mm) Pb-Free Sparse PBGA packages
- Industrial temperature range
Product Categories
Markets and Technologies
Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (4)
Documentation & Resources
-
EE-112: Class Implementation in Analog C++11/14/2016PDF31 K
-
EE-213: Host Communication via the Asynchronous Memory Interface for Blackfin® Processors (Rev. 2)2/14/2015PDF134 kB
-
EE-350: Seamlessly Interfacing MEMS Microphones with Blackfin Processors (Rev. 1)8/27/2010PDF701 kB
-
• EE-350: Code Example
ZIP -
EE-335: Interfacing SD Cards with Blackfin Processors (Rev. 1)3/4/2010PDF2666 kB
-
• EE-335: Code Example
ZIP -
EE-347: Formatted Print to a UART Terminal with Blackfin® Processors (Rev. 3)2/2/2010PDF112 kB
-
• EE-347: Code example
ZIP -
EE-339: Using External Switching Regulators with Blackfin® Processors (Rev. 1)8/18/2009PDF163 kB
-
EE-326: Blackfin® Processor and SDRAM Technology (Rev. 2)8/18/2009PDF958 kB
-
• EE-326: Code example
ZIP -
EE-271: Using Cache Memory on Blackfin® Processors (Rev. 2)8/18/2009PDF1634 kB
-
• EE-271: Code example
ZIP -
EE-240: ADSP-BF533 Blackfin® Booting Process (Rev. 4)8/18/2009PDF332 kB
-
• EE-240: Code example
ZIP -
EE-340: Connecting SHARC® and Blackfin® Processors over SPI (Rev. 1)5/8/2009PDF209 kB
-
• EE-340: Code example
ZIP -
EE-301: Video Templates for Developing Multimedia Applications on Blackfin® Processors (Rev. 1)5/8/2009PDF175 kB
-
• EE-301: Video Template Code
ZIP -
EE-229: Estimating Power for ADSP-BF531/BF532/BF533 Blackfin® Processors (Rev. 4)5/8/2009PDF188 kB
-
• EE-229: Power Spreadsheets
ZIP -
EE-312: Building Complex VDK/LwIP Applications Using Blackfin® Processors (Rev. 2)10/8/2008PDF162 kB
-
• EE-312: Code example
ZIP -
EE-281: Hardware Design Checklist for the Blackfin® Processors (Rev. 2)7/7/2008PDF77 kB
-
EE-334: Using Blackfin® Processor Hibernate State for Low Standby Power (Rev. 1)5/17/2008PDF904 kB
-
• EE-334: Associated ZIP File
ZIP -
EE-321: Connecting Blackfin® Processors to the AD7656 SAR ADC (Rev. 1)3/27/2008PDF176 kB
-
• EE-321: Associated ZIP File
ZIP -
EE-204: Blackfin® Processor SCCB Software Interface for Configuring I2C® Slave Devices (Rev. 2)3/26/2008PDF355 kB
-
• EE-204: Associated Code (Rev 3, 02/2008)
ZIP -
EE-333: Interfacing Blackfin® Processors to Winbond W25X16 SPI Flash Devices (Rev. 1)3/25/2008PDF229 kB
-
• EE-333: Associated Code
ZIP -
EE-323: Implementing Dynamically Loaded Software Modules (Rev. 1)3/8/2008PDF0
-
• EE-323: Associated Code
ZIP -
EE-330: Windows Vista Compatibility in VisualDSP++ 5.0 Development Tools (Rev. 1)8/31/2007PDF276 kB
-
EE-185: Fast Floating-Point Arithmetic Emulation on Blackfin® Processors (Rev. 4)8/28/2007PDF119 kB
-
• EE-185: Associated Code (Rev 4, 08/2007)
ZIP -
EE-325: Interfacing Atmel Fingerprint Sensor AT77C104B with Blackfin® Processors (Rev. 1)8/20/2007PDF2072 kB
-
• EE-325: Code Example
ZIP -
EE-324: System Optimization Techniques for Blackfin® Processors (Rev. 1)7/12/2007PDF146 kB
-
• EE-324: Associated Code
ZIP -
EE-294: Energy-Aware Programming on Blackfin Processors (Rev. 1)6/27/2007PDF102 kB
-
EE-175: Emulator and Evaluation Hardware Troubleshooting Guide for VisualDSP++ Users (Rev. 14)5/21/2007PDF183 kB
-
• EE-175: Associated Files
ZIP -
EE-311: VisualDSP++® Flash Programmer API for Blackfin® Processors (Rev. 1)12/15/2006PDF0 kB
-
• EE-311: Code Example
ZIP -
EE-307: Blackfin® Processor Troubleshooting Tips Using VisualDSP++® Tools (Rev. 1)12/14/2006PDF223 kB
-
EE-308: Estimating and Optimizing Booting Time for Blackfin® Processors (Rev. 1)12/13/2006PDF403 kB
-
• EE-308: Associated ZIP File
ZIP -
EE-309: Power Mode Transition Times of Blackfin® Processors (Rev. 1)12/6/2006PDF458 kB
-
EE-306: PGO Linker - A Code Layout Tool for Blackfin Processors (Rev. 1)12/5/2006PDF65 kB
-
• EE-306: Associated File
ZIP -
EE-304: Using the Blackfin® Processor SPORT to Emulate a SPI Interface (Rev. 1)11/15/2006PDF194 kB
-
• EE-304: Associated Source Code
ZIP -
EE-303: Using VisualDSP++® Thread-Safe Libraries with a Third-Party RTOS (Rev. 1)11/15/2006PDF56 kB
-
EE-302: Interfacing ADSP-BF53x Blackfin® Processors to NAND FLASH Memory (Rev. 1)11/15/2006PDF152 kB
-
EE-300: Interfacing Blackfin® EZ-KIT Lite® Boards to CMOS Image Sensors (Rev. 1)11/15/2006PDF0 kB
-
• EE-300: Sensor Table
ZIP -
EE-289: Implementing FAT32 File Systems on ADSP-BF533 Blackfin® Processors (Rev. 1)9/15/2006PDF320 kB
-
• EE-289 Software Code
ZIP -
EE-258: Interfacing Micron MT9V022 Image Sensors to Blackfin® Processors (Rev. 2)6/20/2006PDF896 kB
-
EE-288: USB OTG Interface for ADSP-BF533 Blackfin® Processors (Rev. 1)3/20/2006PDF166 kB
-
• EE-288 Software Code
ZIP -
AN-813: Interfacing the ADSP-BF533/ADSP-BF561 Blackfin®; Processors to High Speed Parallel ADCs2/3/2006PDF192 kB
-
EE-276: Video Framework Considerations for Image Processing on Blackfin® Processors (Rev. 1)11/8/2005PDF77 kB
-
EE-269: A Beginner’s Guide to Ethernet 802.3 (Rev. 1)6/7/2005PDF447 kB
-
EE-261: Understanding Jitter Requirements of PLL-Based Processors (Rev. 1)2/15/2005PDF90 kB
-
EE-228: Switching Regulator Design Considerations for ADSP-BF533 Blackfin® Processors (Rev. 1)2/14/2005PDF118 kB
-
EE-257: A Boot Compression/Decompression Algorithm for Blackfin® Processors (Rev. 1)12/16/2004PDF178 kB
-
• EE-257 Software Code
ZIP -
EE-236: Real-Time Solutions Using Mixed-Signal Front-End Devices with the Blackfin® Processor (Rev. 1)7/21/2004PDF149 kB
-
• EE-236 Software Code
ZIP -
EE-234: Interfacing T1/E1 Transceivers/Framers to Blackfin® Processors via the Serial Port (Rev. 1)7/21/2004PDF245 kB
-
• Software Code and Schematics
ZIP -
EE-239: Running Programs from Flash on ADSP-BF533 Blackfin® Processors (Rev. 1)5/28/2004PDF134 kB
-
EE-235: An Introduction to Scripting in VisualDSP++® (Rev. 1)5/19/2004PDF342 kB
-
EE-183: Rational Sample Rate Conversion with Blackfin® Processors (Rev. 5)10/30/2003PDF231 kB
-
• EE-183 Software Code
ZIP -
EE-197: ADSP-BF531/532/533 Blackfin® Processor Multi-cycle Instructions and Latencies10/8/2003PDF282 kB
-
EE-203: Interfacing the ADSP-BF535/ADSP-BF533 Blackfin® Processor to NTSC/PAL video decoder over the asynchronous port.9/10/2003PDF1634 kB
-
EE-192: Using C To Create Interrupt-Driven Systems On Blackfin® Processors5/30/2003PDF115 kB
-
EE-68: Analog Devices JTAG Emulation Technical Reference (Rev. 10)12/20/2002PDF293 kB
-
EE-149: Tuning C Source Code for the Blackfin® Processor Compiler12/16/2002PDF72 kB
-
EE-128: DSP in C++: Calling Assembly Class Member Functions From C++9/18/2002PDF172 kB
-
EE-110: A Quick Primer on ELF and DWARF File Formats5/17/2000PDF19 kB
-
EE-104: Setting Up Streams with the VisualDSP Debugger11/5/1999PDF120 kB
-
• EE-104 Software Code
ZIP
-
Blackfin®/SHARC® USB EZ-Extender® Manual (Rev. 1.1)5/7/2009PDF359 kB
-
Blackfin® USB-LAN EZ-Extender® Manual (Rev. 2.2)3/24/2008PDF604 kB
-
Blackfin® EZ-Extender® Manual (Rev. 4.1)8/15/2006PDF279 kB
-
Blackfin® A-V EZ-Extender® Manual (Rev. 2.1)7/26/2006PDF571 kB
-
Blackfin® FPGA EZ-Extender® Manual (Rev. 2.1)7/26/2006PDF694 kB
-
ADSP-BF533 Blackfin® Processor Hardware Reference (Rev. 3.6)8/24/2006PDF10039 kB
-
ADSP-BF5xx/ADSP-BF60x Blackfin® Processor Programming Reference (Rev. 2.2)7/18/2006PDF20321 kB
-
Documentation Errata
-
VisualDSP++® 5.0 Assembler and Preprocessor Manual (Rev. 3.4)11/15/2009PDF3197 kB
-
VisualDSP++® 5.0 C/C++ Compiler and Library Manual for Blackfin Processors (Rev. 5.4)11/13/2009PDF3852 kB
-
Documentation Errata
-
VisualDSP++® 5.0 Loader and Utilities Manual (Rev. 2.5)11/13/2009PDF2246 kB
-
Documentation Errata
-
VisualDSP++® 5.0 Device Drivers and System Services Manual for Blackfin Processors (Rev. 4.3)11/13/2009PDF2484 kB
-
Documentation Errata
-
VisualDSP++® 5.0 Licensing Guide (Rev. 1.4)11/13/2009PDF392 kB
-
VisualDSP++® 5.0 Kernel (VDK) Users Guide (Rev. 3.5)11/13/2009PDF2401 kB
-
VisualDSP++® 5.0 Linker and Utilities Manual (Rev. 3.5)11/13/2009PDF2290 kB
-
VisualDSP++® 5.0 Users Guide (Rev. 3.0)12/9/2007PDF2738 kB
-
VisualDSP++® 5.0 Quick Installation Reference Card (Rev. 3.1)8/30/2007PDF91 kB
-
VisualDSP++® 5.0 Getting Started Guide (Rev. 3.0)8/30/2007PDF2035 kB
-
Documentation Errata
-
VisualDSP++® 5.0 Product Release Bulletin (Rev. 3.0)8/30/2007PDF774 kB
-
ICE-1000/ICE-2000 Emulator User’s Guide (Rev. 1.2)6/3/2014PDF321 kB
-
HPUSB, USB, and HPPCI Emulator User’s Guide (Rev. 3.2)11/11/2009PDF746 kB
-
ICE-100B Emulator User’s Guide (Rev. 1.1)11/11/2009PDF348 kB
-
ADSP-BF531/BF532/BF533 Blackfin Anomaly List for Revisions 0.5, 0.6 (Rev. I)3/14/2014PDF342 K
-
Blackfin Processor Family Product Highlight4/7/2008PDF2027 kB
-
EZ-KIT Lite for ADSP-BF533 Blackfin Processor Product Highlight3/8/2008PDF1341 kB
-
ADSP-BF531/ADSP-BF532 Low Power General-Purpose Blackfin Processor3/8/2008PDF944 kB
-
ADI Complementary Parts Guide - Supervisory Devices and DSP Processors2/12/2015PDF93 K
-
Graphical Embedded System Design Empowers Life Saving Spider Robots5/1/2008
-
A BDTI Analysis of the Analog Devices ADSP-BF5xx3/8/2008PDF106 kB
-
Designing IPTV Set-top Boxes Without Getting Boxed In3/8/2008PDF47 kB
-
Understanding Advanced Processor Features Promotes Efficient Coding3/8/2008PDF432 kB
-
Video Filtering Considerations for Media Processors3/8/2008PDF231 kB
-
High-Performance Multichannel Power-Line Monitoring with Simultaneous-Sampling ADCs1/1/2007 Analog Dialogue
-
Fast, Versatile Blackfin® Processors Handle Advanced RFID Reader Applications9/1/2006 Analog Dialogue
-
Security Without Compromise9/1/2005
-
A Smart Modem for Robust Wireless Data Transmission Over ISM Bands (433 MHz, 868 MHz, and 902 MHz)3/1/2005 Analog Dialogue
-
Enhance Processor Performance in Open-Source Applications2/1/2005PDF172 kB
-
Is it Really Possible to Play DVD Quality Media While Executing Linux Applications?1/1/2000PDF178 kB
Software & Systems Requirements
Software & Tools Anomalies
Middleware
Lightweight TCP/IP (lwIP) Stack
Tools & Simulations
Design Tools
IBIS Models
BSDL Model Files
Surface Mount Assembly Recommendations for Plastic Ball Grid Array (PBGA) Packages
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
PCN-PDN Information
Support & Discussions
Sample & Buy
Ordering FAQs
See our Ordering FAQs for answers to questions about online orders, payment options and more.
Buy Now Pricing
(**) Displayed Buy Now Price and Price Range is based on small quantity orders.
List Pricing
(*)The 1Ku list pricing shown is for BUDGETARY USE ONLY, shown in United States dollars (FOB USA per unit for the stated volume), and is subject to change. International prices may differ due to local duties, taxes, fees and exchange rates. For volume-specific price or delivery quotes, please contact your local Analog Devices, Inc. authorized distributor. Pricing displayed for Evaluation Boards and Kits is based on 1-piece pricing.
Lead Times
Please see the latest communication from our CCO regarding lead times.
Sampling
Selecting the Sample button above will redirect to the third-party ADI Sample Site. The part selected will carry over to your cart on this site once logged in. Please create a new account there if you have never used the site before. Contact SampleSupport@analog.com with any questions regarding this Sample Site.
Evaluation Boards
Pricing displayed is based on 1-piece.
Up to two boards can be purchased through Analog.com. To order more than two, please purchase through one of our listed distributors.
Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.