PLL / VCO内蔵PLL

FAQs:

Ask the Engineer: PLL Synthesizers

Other PLLs FAQs and RAQs

Video

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Tutorials & Webcasts

Fundamentals of Frequency Synthesis, Part 1: Phase Locked Loops
The first of a two-part series on frequency synthesis, with an introduction to Phase Locked Loops. This webcast looks at the need for frequency generation, the techniques from the past present and future, and how to assess the performance of a frequency synthesis, and real world applications. Particular attention will be focused on Phase Locked Loops (PLL's) as frequency synthesizers.

Fundamentals of Frequency Synthesis, Part 2: Direct Digital Synthesis (DDS)
The second of a two-part series on frequency synthesis, with an introduction to Direct Digital Synthesis. We will give a basic review of how a direct digital synthesis system works, touching on the inner workings of the DDS engine at a relatively high level. We will also discuss the tradeoffs between PLL and DDS technology as a base choice for frequency synthesis needs.

Fundamentals of Clocks and Clocking
The webcast covers the fundamentals of clock synthesis and distribution. It covers the various types of phase-locked loops (PLLs), the key features of these devices, and which end market they are designed for. Concepts such as reference switchover, holdover, phase noise, jitter, output drivers, and signal integrity will be covered.

Solutions for Fitting High Performance RF Signal Chains into Small Spaces
This webinar will present the current state of integration of RF IC technology, with a focus on the challenges that non-handset-based wireless equipment designers face as they strive for more functionality in smaller spaces, sometimes with the added headache of having to implement broadband transceivers that can be reused at multiple frequencies.

Fundamentals of the RF Transmission and Reception of Digital Signals
Digital Modulation is an important topic for RF designers because most modern day transceivers transmit and receive digitally modulated data. In this webcast, part of ADI's continuing FUNDAMENTALS OF DESIGN series we will introduce you to the challenges—and solutions—for digital modulation. This webcast is a great way for beginners to get introduced to this vital communications standard or for veteran RF designers learn what's new in the field.

Interfacing RF Components
Few things are as critical to the success to any RF design as the interfacing of the stages within the receiver and transmitter. Harmonics, undesired attenuation, and other deficiencies can manifest themselves in a circuit in which the stages are not properly connected. This webcast will introduce the best practices that will help you get the most out of your RF circuit.

PLLs Technical Articles

Direct Conversion Receiver Designs Enable Multi-standard/Multi-band Operation
Modern direct conversion provides a compelling solution for field programmable radio designs and offers a cost benefit and potential performance advantage over traditional receiver solutions. By Austin Harney (RF Designline, 2/16/2009)

Direct Digital Synthesis (DDS) Controls Waveforms in Test, Measurement, and Communications (Analog Dialogue, Vol. 39, August 2005)

Design a Direct 6-GHz Local Oscillator with a New, Wideband, Integer-N, PLL Synthesizer (Analog Dialogue, Vol. 35, No. 6, November-December, 2001)

Ask the Applications Engineer—30: PLL SYNTHESIZERS (Analog Dialogue, Vol. 36, No. 3, May-July, 2002)

Phase-locked loops for high-frequency receivers and transmitters

Part 1: Introduction (Analog Dialogue, Vol. 33, No. 3, March, 1999)

Part 2: Phase Noise and Reference Spurs (Analog Dialogue, Vol. 33, No. 5, May, 1999)

Part 3: Basic Building Blocks (Analog Dialogue, Vol. 33, No. 7, July-August, 1999)

Brochures & Bulletins

RF/IF Selection Guide

RF IC Solutions Bulletin

Data Sheets

PLLs Data Sheets

Parametric Search

Fractional-N

Integer-N

PLLs with Integrated VCOs

Tools
ADIsimRF™
Video: ADIsimRF™

ADIsimPLL™
Video: ADIsimPLL™

Design Calculators

PLL Register Configuration Assistants
These tools will generate the hex code values needed to configure the registers of the AD41xx and ADF42xx PLLs. They will also help determine the the values of the counters needed to obtain a certain output frequency given a reference clock.

Ibis Models

ADF4350BCPZ

ADF4116BRUZ

ADF4106 Ibis Models
ADF4106BRUZ
ADF4106BCPZ

Utilities & Conversions

RF Impedance Matching Tool
This calculator matches a known complex load to a desired impedance at a given frequency. Computes component values and displays a sample circuit of the matching network.

The online support community for engineers.

Circuits from the Lab

CN-0174: Low Noise, 12 GHz, Microwave Fractional-N Phase-Locked Loop (PLL) Using an Active Loop Filter and RF Prescaler

CN-0147: Powering a Fractional-N Voltage Controlled Oscillator (VCO) with Low Noise LDO Regulators for Reduced Phase Noise

CN-0144: Broadband Low Error Vector Magnitude (EVM) Direct Conversion Transmitter Using LO Divide-by-2 Modulator

CN-0134: Broadband Low Error Vector Magnitude (EVM) Direct Conversion Transmitter

CN-0003: Very Low Jitter Encode (Sampling) Clocks for High Speed Analog-to-Digital Converters Using the ADF4002 PLL

PLLs Application Notes

AN-0974: Multicarrier TD-SCMA Feasibility (pdf, 634 KB)

AN-807: Multicarrier WCDMA Feasibility (pdf, 969 KB)

AN-808: Multicarrier CDMA2000 Feasibility
The goal of this application note is to determine the feasibility of implementing a multicarrier CDMA2000 transceiver and what the major subsystem performances must be. (pdf, 1535 KB)

AN-873: Lock Detect on the ADF4xxx Family of PLL Synthesizers (pdf, 207 KB)

AN-826: A 2.4 GHz WiMAX Direct Conversion Transmitter (pdf, 417 kB)

AN-30: Ask the Applications Engineer - PLL Synthesizers (pdf, 184 KB)

User Guides

PLL User Guides