MAX96752
推荐用于新设计GMSL2 Deserializer with Dual LVDS (OLDI) Output
- 产品模型
- 4
概述
- 1 x 4, 2 x 4, or 1 x 8 OLDI Output Lane Configurations
- 3Gbps or 6Gbps Forward Link Rates for System and Power Flexibility
- Full-Duplex Capability Over a Single Wire
- Supports Up to 300MHz PCLK
- Supports Video Replication and Dual-View Splitting for Driving Two Displays
- Uses Low-Cost 50Ω Coax or 100Ω STP Cables
- Forward and Reverse I2S or 7.1 TDM Audio
- Optional Internal VDD Regulator
- ASIL-Relevant Functional Safety Features
- ASIL-B Compliant
- 16-Bit CRC Protection of Control Channel Data (I2C, UART, SPI, GPIO, Audio)
- Retransmission of All Control Channel Data (I2C, UART, SPI, GPIO, Audio) Upon Error Detection
- Optional 32-Bit Video Line Cyclic Redundancy Check (CRC)
- Selectable Interrupts for Fault Detection
- Video Watermark Detection
- Performance Tools Ensure High Link Margin
- Continuous Adaptive Equalization on GMSL links
- Forward and Reverse Channel Pseudorandom Binary Sequence (PRBS) Generator and Checker for BER Testing of Serial I/O Links
- Eye-Opening Monitor for Continuous Link Margin Diagnosis
- Concurrent Control Channel for Device Configuration and Communicating with Remote Peripherals
- I2C, UART, Pass-Through I2C/UART, SPI, and Tunneled or Register-Programmable GPIO
- Settable Priority Levels
- Eight Hardware Programmable Device Addresses
- Up to 14 Programmable General Purpose Input/Output (GPIO)
- Sleep Mode with Register State Retention
- Compact 8mm x 8mm TQFN Package with Exposed Pad
The MAX96752 deserializers convert a single- or dual-link GMSL™ serial input to single or dual OLDI. They also send and receive side-channel and peripheral control data, enabling full-duplex, single-wire transmission of video and bidirectional data.
The OLDI output can be configured as single-port (4 or 8 lanes) or dual-port (2 x 4 lanes) for flexibility in driving displays with a variety of resolutions. Each port accommodates pixel clock rates of up to 150MHz, and in dual-port mode, the MAX96752 support a combined pixel clock of up to 300MHz.
The GMSL2 concurrent control channel operates in I2C or UART mode. Two additional pass-through I2C or UART channels and a pass-through SPI channel are provided for peripheral control. The bidirectional audio channel supports I2S stereo and up to 8 channels in TDM mode.
Operation is specified over the -40°C to +105°C automotive temperature range. The devices are AEC-Q100 qualified.
Data can be transmitted over low-cost 50Ω Coax or 100Ω STP cables that meet the GMSL2 channel specification.
APPLICATIONS
- Cluster and Heads-Up Displays
- Central Information Displays
- Rear-Seat Infotainment Displays
参考资料
数据手册 1
用户手册 3
非常见问题 1
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| 产品型号 | 引脚/封装图-中文版 | 文档 | CAD 符号，脚注和 3D模型 |
|---|---|---|---|
| MAX96752GTN/V+ | LFCSP | ||
| MAX96752GTN/V+T | LFCSP | ||
| MAX96752GTN/VY+ | LFCSP | ||
| MAX96752GTN/VY+T | LFCSP |
| 产品型号 | 产品生命周期 | PCN |
|---|---|---|
|
12月 20, 2024 - 2451 ASSEMBLY |
||
| MAX96752GTN/V+ | 量产 | |
| MAX96752GTN/V+T | 量产 | |
| MAX96752GTN/VY+ | 量产 | |
| MAX96752GTN/VY+T | 量产 | |
|
5月 18, 2022 - 2213A TEST,WAFER FAB |
||
| MAX96752GTN/V+ | 量产 | |
| MAX96752GTN/V+T | 量产 | |
| MAX96752GTN/VY+T | 量产 | |
|
4月 10, 2020 - 1950 ASSEMBLY |
||
| MAX96752GTN/V+ | 量产 | |
| MAX96752GTN/V+T | 量产 | |
这是最新版本的数据手册
工具及仿真模型
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GMSL oLDI/LVDS 转 HDMI 适配器
资料
软件
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