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ADF4106: PLL Frequency Synthesizer Data Sheet (Rev. E)9/30/2015PDF370 kB
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ADF4106-EP: Enhanced Product Data Sheet (Rev. D)9/30/2015PDF316K
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ADF4106-DSCC: Military Data Sheet9/30/2015
Overview
Features and Benefits
- 6.0 GHz bandwidth
- 2.7 V to 3.3 V power supply
- Separate charge pump supply (VP) allows extended tuning voltage in 3 V systems
- Programmable dual-modulus prescaler 8/9, 16/17, 32/33, 64/65
- Programmable charge pump currents
- Programmable antibacklash pulse width
- 3-wire serial interface
- Analog and digital lock detect
- Hardware and software power-down mode
- Download ADF4106-EP data sheet (pdf)
- Military temperature range (−55°C to +125°C)
- Controlled manufacturing baseline
- One assembly/test site
- One fabrication site
- Enhanced product change notification
- Qualification data available upon request
- V62/11606 DSCC Drawing Number
Product Details
The ADF4106 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, programmable A counter and B counter, and a dual-modulus prescaler (P/P + 1). The A (6-bit) counter and B (13-bit) counter, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R Counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.
ADF4106-EP Supports defense and aerospace applications (AQEC standard).
Applications
- Broadband wireless access
- Satellite systems
- Instrumentation
- Wireless LANS
- Base stations for wireless radios
Product Categories
Markets and Technologies
Product Lifecycle
Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (1)
Documentation & Resources
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AN-807: Multicarrier WCDMA Feasibility (Rev. 0)11/9/2007PDF969 kB
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AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)11/9/2007PDF1535 kB
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AN-873: Lock Detect on the ADF4xxx Family of PLL Synthesizers (Rev. 0)12/6/2006PDF207 kB
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Ask the Applications Engineer - PLL Synthesizers (Rev. AN-30)12/6/2004PDF184 kB
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UG-159: LMDS Evaluation Board for PLL Frequency Synthesizer10/6/2015PDF231 kB
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UG-161: PLL Frequency Synthesizer Evaluation Board9/14/2015PDF238 kB
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UG-476: PLL Software Installation Guide8/10/2015PDF520 kB
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UG-582: Evaluating the EVAL-CN0290-SDPZ9/4/2013PDF306 kB
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FAQs7/26/2017
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RF, Microwave, and Millimeter Wave Product Selection Guide7/13/2018PDF9M
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CN-0290: Extending the Low Frequency Range of a High Performance Phase Locked Loop9/24/2013PDF311 kB
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How to Design and Debug a Phase-Locked Loop (PLL) Circuit9/1/2013 Analog Dialogue
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Direct Digital Synthesis (DDS) Controls Waveforms in Test, Measurement, and Communications8/1/2005 Analog Dialogue
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Fast-Locking, High Sensitivity Tuned-IF Radio Receiver Achieved with a 7-GHz Synthesizer5/1/2003 Analog Dialogue
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Ask the Applications Engineer—30: PLL Synthesizers5/1/2002 Analog Dialogue
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Design a Direct 6-GHz Local Oscillator with a New, Wideband, Integer-N, PLL Synthesizer11/1/2001 Analog Dialogue
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Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 37/1/1999 Analog Dialogue
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Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 25/1/1999 Analog Dialogue
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Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 13/1/1999 Analog Dialogue
Software & Systems Requirements
Tools & Simulations
Design Tools
ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.
ADIsimRF is an easy-to-use RF signal chain calculator. Cascaded gain, noise, distortion and power consumption can be calculated, plotted and exported for signal chains with up to 50 stages. ADIsimRF also includes an extensive data base of device models for ADI’s RF and mixed signal components.
Reference Designs (1)
Product Recommendations
ADF4106 Companion Parts
Recommended Linear Regulators
- For ultralow noise, 3V applications,150 mA output: ADP150.
- For ultalow noise, 3V applications, 200 mA output: ADP151.
- For high accuracy, 5V applications: ADP3334.
- For a step up, 3V to 5V regulator: ADP1613.
Recommended Divide-by-4 Prescaler
- For a low noise, low power, fixed RF block: ADF5001.
Recommended Modulators/Demodulators
Recommended PLL Active Filter
- For an ultralow noise, rail-to-rail amplifier: OP184.
Design Resources
ADI has always placed the highest emphasis on delivering products that meet the maximum levels of quality and reliability. We achieve this by incorporating quality and reliability checks in every scope of product and process design, and in the manufacturing process as well. "Zero defects" for shipped products is always our goal.
PCN-PDN Information
Support & Discussions
ADF4106 Discussions
Sample & Buy
Ordering FAQs
See our Ordering FAQs for answers to questions about online orders, payment options and more.
Buy Now Pricing
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List Pricing
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Sampling
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Evaluation Boards
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Pricing displayed is based on 1-piece. The USA list pricing shown is for budgetary use only, shown in United States dollars (FOB USA per unit), and is subject to change. International prices may vary due to local duties, taxes, fees and exchange rates.