Overview
Features and Benefits
- Divide-by-4 prescaler
- High frequency operation: 4 GHz to 18 GHz
- Integrated RF decoupling capacitors
- Active mode: 30 mA
- Power-down mode: 7 mA
- Low phase noise: −150 dBc/Hz
- Single dc supply: 3.3 V compatible with ADF4xxx PLLs
- Temperature range: −40°C to +105°C
- Small package: 3 mm × 3 mm LFCSP
Product Details
The ADF5001 prescaler is a low noise, low power, fixed RF divider block that can be used to divide down frequencies as high as 18 GHz to a lower frequency suitable for input into a PLL IC, such as the ADF4156 or ADF4106. The ADF5001 provides a divide-by-4 function. The ADF5001 operates off a 3.3 V supply and has differential 100 Ω RF outputs to allow direct interface to the differential RF inputs of PLLs such as the ADF4156 and ADF4106.
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Production
At least one model within this product family is in production and available for purchase. The product is appropriate for new designs but newer alternatives may exist.
Evaluation Kits (1)
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ADIsimPLL enables the rapid and reliable evaluation of new high performance PLL products from ADI. It is the most comprehensive PLL Synthesizer design and simulation tool available today. Simulations performed include all key non-linear effects that are significant in affecting PLL performance. ADIsimPLL removes at least one iteration from the design process, thereby speeding the design- to-market.
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Reference Designs (1)
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ADF5001 Companion Parts
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ADF5001 Discussions
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